Tuesday | 9:00 am
Tuesday, January 30 | 9:00am - 4:30pm
Location: Ballroom G
Tuesday, 9:00am - 4:30pm
Lee Ritchey (President, Speeding Edge)
Pass Types :
All Access Pass, Alumni All Access Pass, Boot Camp Pass
Track :
Boot Camp
Audience Level :
Introductory
Format :
Full Day Boot Camp
Tuesday, January 30 | 9:00am - 4:30pm
Location: Ballroom E
Tuesday, 9:00am - 4:30pm
Todd Westerhoff (VP, Semiconductor Relations, SiSoft), Michael Steinberger (Lead Architect, Serial Channel Products, SiSoft), Donald Telian (Independent Consultant, SiGuys), Eric Brock (Principal Member of Technical Staff , SiSoft)
Pass Types :
All Access Pass, Alumni All Access Pass, Boot Camp Pass
Track :
Boot Camp
Audience Level :
Introductory
Format :
Full Day Boot Camp
Tuesday, January 30 | 9:00am - 4:30pm
Location: Great America Meeting Room 2
Tuesday, 9:00am - 4:30pm
O.J. Danzy (Senior RF and Microwave Application Engineer, Keysight Technologies), Heidi Barnes (Senior Application Engineer, Keysight Technologies), Mike Resso (Signal Integrity Application Scientist i, Keysight Technologies), Steve Sekel (400G Solutions Specialist, OIF PLL Interop WG Chair, Keysight Technologies), Bob Schaefer (R&D Project Manager and Master Engineer for the Signal Integrity Group, Keysight Technologies), Robert Sleigh (Strategic Planner, Keysight Technologies), Luis Boluna (Senior Application Engineer for High Speed Digital Systems, Keysight Technologies), Brig Asay (Director of Strategic Planning , Keysight Technologies)
Pass Types :
All Access Pass, Alumni All Access Pass, Boot Camp Pass
Track :
Boot Camp
Audience Level :
Introductory
Format :
Full Day Boot Camp
Tuesday, January 30 | 9:00am - 11:50am
Location: Ballroom C
Tuesday, 9:00am - 11:50am
Mike Peng Li (Fellow, Intel)
Pass Types :
All Access Pass, Alumni All Access Pass
Track :
09. Measurement, Simulation, and Optimization of Jitter, Noise, and Timing to Minimize Errors
Audience Level :
All
Format :
3-Hour Tutorial
Tuesday, January 30 | 9:00am - 11:50am
Location: Ballroom D
Tuesday, 9:00am - 11:50am
Brian Zahnstecher (Principal, PowerRox)
Pass Types :
All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
3-Hour Tutorial
Tuesday, January 30 | 9:00am - 11:50am
Location: Ballroom A
Tuesday, 9:00am - 11:50am
Zao Liu (Staff Design Engineer, Xilinx)
Pass Types :
All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
3-Hour Tutorial
Tuesday | 4:45 pm
Tuesday, January 30 | 4:45pm - 6:00pm
Location: Ballroom D
Tuesday, 4:45pm - 6:00pm
Christopher Cheng (Distinguished Technologist, Hewlett-Packard Enterprise), Paul Franzon (Cirrus Logic Distinguished Professor, North Carolina State University), David White (Senior Director of R&D, Cadence Design Systems), Madhavan Swaminathan (John Pippin Chair Professor, Georgia Institute of Technology), Sashi Obilisetty (R&D Director, Synopsys)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Format :
75-Minute Panel Discussion
Tuesday, January 30 | 4:45pm - 6:00pm
Location: Ballroom E
Tuesday, 4:45pm - 6:00pm
Chris Loberg (Sr. Technical Marketing Manager, Tektronix, Inc.), Ransom Stephens, Ph.D. (Signal Integrity Sage, Ransom's Notes), Martin Miller (Chief Scientist, Teledyne-LeCroy), Greg LeCheminant (Measurement Applications Specialist, Digital Communications Analysis, Internet Infrastructure Solutions, Keysight Technologies), Pavel Zivny (Domain Expert, Tektronix), Cathy Liu (R&D Director, Broadcom Limited), Mike Peng Li (Fellow, Intel), Mark Martlett (Principal Engineer, Inphi)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
09. Measurement, Simulation, and Optimization of Jitter, Noise, and Timing to Minimize Errors
Audience Level :
All
Format :
75-Minute Panel Discussion
Tuesday, January 30 | 4:45pm - 6:00pm
Location: Ballroom G
Tuesday, 4:45pm - 6:00pm
Brian Holden (VP of Standards, Kandou Bus SA), Yaniv Kopelman (CTO, Networking, Marvell Semiconductor, Inc.), Amin Shokrollahi (CEO, Kandou Bus SA), Gidi Navon (Principal Engineer, Marvell Semiconductor, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
01. Signal & Power Integrity at the Single-Multi Die, Interposer, and Packaging Level
Audience Level :
All
Format :
75-Minute Panel Discussion
Wednesday | 8:00 am
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom D
Wednesday, 8:00am - 8:45am
Jonathan Fasig (Principal Engineer, Mayo Clinic), Christopher White (Senior Engineer, Mayo Clinic), Barry Gilbert (Director, Mayo Clinic), Clifton Haider (Deputy Director, Mayo Clinic)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom E
Wednesday, 8:00am - 8:45am
Nicke Svee (Sr Specialist R&D, Ericsson AB), Jun Wang (signal integrity engineer, Ericsson AB), Davood Khoda (Signal Integrity design engineer, Ericsson AB)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom F
Wednesday, 8:00am - 8:45am
Youngwoo Kim (Ph.D Candidate, KAIST, Terabyte Interconnection and Package Lab.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom C
Wednesday, 8:00am - 8:45am
Kevin Zheng (Research Assistant, Stanford University), Boris Murmann (Professor, Stanford University), Hongtao Zhang (Senior Staff Design Engineer, Xilinx Inc.), Geoff Zheng (Distinguished Engineer , Xilinx Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom A
Wednesday, 8:00am - 8:45am
Mehdi Mechaik (Staff Application Engineer, Cadence Design Systems)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom G
Wednesday, 8:00am - 8:45am
Mike Peng Li (Fellow, Intel), Hsinho Wu (SOC Design Engineer, Intel), Masashi Shimanouchi (SOC Design Engineer, Intel), Nathan Tracy (Technologist, TE)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
Advanced
Format :
45-Minute Technical Session
Wednesday, January 31 | 8:00am - 8:45am
Location: Ballroom B
Wednesday, 8:00am - 8:45am
Soumya De (SI Engineer, Cisco), Han Gao (SI Engineer, Cisco), Jian Liu (SI Engineer, Cadence), Yaochao Yang (Principal Engineer, Cisco), An-Yu Kuo (Sr. Group Director, Cadence), Miroslav Grubic (SI Engineer, Cisco)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
06. Applying PCB Design and Simulation Tools
Audience Level :
Introductory
Format :
45-Minute Technical Session
Wednesday | 8:30 am
Wednesday, January 31 | 8:30am - 9:10am
Location: Great America Meeting Room 2
Wednesday, 8:30am - 9:10am
Mike Schnecker (Business Development Manager, Rhode & Schwarz USA, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 8:30am - 9:10am
Location: Great America 1
Wednesday, 8:30am - 9:10am
Chun-ting "Tim" Wang Lee (Application Engineer for High Speed Digital applications in the EEsof EDA Group, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 9:00 am
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom A
Wednesday, 9:00am - 9:45am
Marko Marin (Sr, Electronics Design Engineer, Infinera), Yuriy Shlepnev (President, Simberian Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom E
Wednesday, 9:00am - 9:45am
Steve Sandler (Managing Director, Picotest)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom D
Wednesday, 9:00am - 9:45am
Reydezel Torres-Torres (Senior Researcher, INAOE), Svetlana C. Sejas-García (SI Engineer, Isola), Chudy Nwachukwu (SI Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom B
Wednesday, 9:00am - 9:45am
Amendra Koul (Technical Leader - Signal Integrity, Cisco systems inc), Kartheek Nalla (Signal Integrity Engineer, Cisco Systems Inc.), David Nozadze (Signal Integrity Intern, Cisco Systems Inc.), Mike Sapozhnikov (Sr. Signal Integrity Manager, Cisco Systems Inc.), Yaochao Yang (Principal Engineer/Technical Director , Cisco Systems Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom F
Wednesday, 9:00am - 9:45am
Changwook Yoon (System SI/PI Engineer, Intel), Guang Chen (SI/PI engineer, Intel), Hyosoon Kang (SI/PI engineer, Intel), Ashkan Hashemi (SI/PI engineer, Intel), Janani Chandrasekhar (SIPI Engineer , Intel), David Greenhill (Senior Director, Intel), Wendem Beyene (Technical Director, Rambus)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
07. Advanced IO Interface Design for Memory and 2.5D/3D/SiP Integrations
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom C
Wednesday, 9:00am - 9:45am
Zhaoyin Daniel Wu (Senior Staff Engineer, Xilinx Inc), Parag Upadhyaya (Director, SERDES Technology Group, Xilinx Inc), Geoff Zhang (Distinguished Engineer, Xilinx Inc), Ade Bekele (Senior Staff Design Engineer, Xilinx Inc.), Santiago Asuncion (Product Application Engineer, Xilinx Inc.), Yohan Frans (Senior Engineering Director, Xilinx, Inc), Ken Chang (Vice President, SerDes Technology, Xilinx Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
01. Signal & Power Integrity at the Single-Multi Die, Interposer, and Packaging Level
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 9:00am - 9:45am
Location: Ballroom G
Wednesday, 9:00am - 9:45am
Gustavo Blando (Senior Principal Engineer, Oracle Corporation), Istvan Novak (Senior Principle Engineer, Oracle Corporation), Eben Kunz (Senior Hardware Engineer, Oracle Corporation), Gregory Truhlar (Senior Hardware Engineer, Oracle Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
Introductory
Format :
45-Minute Technical Session
Wednesday | 9:20 am
Wednesday, January 31 | 9:20am - 10:00am
Location: Great America 3
Wednesday, 9:20am - 10:00am
Mohit Gupta (Senior Director Product Marketing, Rambus), Don Cober (Principal Engineer, Ethernet IP, CoMira)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 9:20am - 10:00am
Location: Great America Meeting Room 2
Wednesday, 9:20am - 10:00am
Ching-Chao Huang (President , AtaiTec Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 9:20am - 10:00am
Location: Great America 1
Wednesday, 9:20am - 10:00am
Brad Doerr (R&D Manager Digital & Photonics Center of Excellence, Keysight Technologies), Ailee Grumbine (Strategic Product Planner – Data Analytics, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 10:00 am
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom F
Wednesday, 10:00am - 10:45am
Xiaoqing Dong (System engineer, Huawei Technologies), Gongxian Jia (System Engineer , Huawei Technologies), Vivek Shah (Engineering Director , Molex LLC), Kingle Wang (Signal Integrity Engineer , Molex LLC), Chunxing huang (System engineer, Shenzhen Zhongzeling Electronics), Yu Bi (Sr. Signal Integrity Engineer , Molex LLC)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom E
Wednesday, 10:00am - 10:45am
Vladimir Dmitriev-Zdorov (Principal Engineer, Mentor Graphics, a Siemens Business), Bert Simonovich (President, Lamsim Enterprises Inc), Igor Kochikov (Principal Engineer, Mentor Graphics, a Siemens Business)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom D
Wednesday, 10:00am - 10:45am
Qiaolei Huang (PhD student, Missouri Univ of Sci& Tech), Takashi Enomoto (EMC Engineer, Sony GM&O), Shingo Seto (EMC Engineer, Sony GM&O), Kenji Araki (Deputy General Manager and Principal Engineer, Sony GM&O), Jun Fan (Professor, Missouri Univ of Sci& Tech), Chulsoon Hwang (Assistant Professor, Missouri Univ of Sci& Tech)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom B
Wednesday, 10:00am - 10:45am
Hsinho Wu (Design Engineer, Intel), Mike Li (Fellow, Intel), Masashi Shimanouchi (Design Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom C
Wednesday, 10:00am - 10:45am
Sunil Gupta (Ph.D., Qualcomm Technologies, Inc.), Will Navaja (Staff, Qualcomm Technologies, Inc.), Patrick Zilaro (Senior Staff, Qualcomm Technologies, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom G
Wednesday, 10:00am - 10:45am
Scott Wedge (Principal Engineer, Synopsys, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
02. Mixed Signal Modeling: Algorithmic and Simulation Solutions
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 10:00am - 10:45am
Location: Ballroom A
Wednesday, 10:00am - 10:45am
Martin Miller (Chief Scientist, Teledyne-LeCroy)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday | 10:15 am
Wednesday, January 31 | 10:15am - 10:55am
Location: Great America 3
Wednesday, 10:15am - 10:55am
Saman Sadr (VP High Speed SerDes IO, Rambus)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Advanced
Format :
40-Minute Technical Session
Wednesday, January 31 | 10:15am - 10:55am
Location: Great America Meeting Room 2
Wednesday, 10:15am - 10:55am
Mike Schnecker (Business Development Manager, Rhode & Schwarz USA, Inc.), Randy White (Strategic Oscilloscope Planner, Rohde and Schwarz)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 10:15am - 10:55am
Location: Great America 1
Wednesday, 10:15am - 10:55am
Robert Sleigh (Strategic Planner– Network Data Centers, Keysight Technologies), Greg LeCheminant (Measurement Applications Specialist, Digital Communications Analysis, Internet Infrastructure Solutions, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 11:00 am
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom G
Wednesday, 11:00am - 11:45am
Qian Wang (Design Engineer, Xilinx, Inc), Penglin Niu (Sr. Design Engineer Manager, Xilinx, Inc), Thomas To (Technical Director, Xilinx, Inc)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
01. Signal & Power Integrity at the Single-Multi Die, Interposer, and Packaging Level
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom A
Wednesday, 11:00am - 11:45am
Hee-Soo LEE (Lead Application Developer, Keysight Technologies), Nathan Hirsch (PCB Engineer, Monsoon Solutions, Inc), Orlando Bell (VP of Engineering, GigaTest Labs)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom C
Wednesday, 11:00am - 11:45am
Allen F Horn III (Research Fellow, Rogers Corporation), Christopher J. Caisse (R&D Engineer, Rogers Corporation), Patricia A. LaFrance (Sr. Engineering Assistant, Rogers Corporation), Kristi Pance (Sr. Principal Innovator, Rogers Corporation Innovation Center), James C. Rautio (CEO, Sonnet Software)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom B
Wednesday, 11:00am - 11:45am
Richard Mellitz (Distinguished Engineer, Samtec)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom F
Wednesday, 11:00am - 11:45am
Xu Yan (Signal Integrity Engineer, Cisco System Inc.), Stephen Scearce (Hardware Engineering Manager, Cisco Systems), Baoshu Xu (Technical Leader , Cisco System Inc.), Greg Fu (Technical Leader, Cisco System Inc.), Tonghao Ding (Signal Integrity Engineer, Cisco System Inc.), Andrew Bell (Applications Engineering Manager, WUS Printed Circuits)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom D
Wednesday, 11:00am - 11:45am
Cosmin Iorga (Engineer, NoiseCoupling.com)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday, January 31 | 11:00am - 11:45am
Location: Ballroom E
Wednesday, 11:00am - 11:45am
Lei Shan (RSM, IBM Corporation, T J Watson Research Center), Daniel Friedman (RSM, IBM Corp., T J Watson Research Center), Craig Kennedy (Engineer , Amphenol Corporation), Warren Persak (Manager, Amphenol Corporation), Kevin Lau (Sales Manager and Product Manager, Amphenol Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
45-Minute Technical Session
Wednesday | 11:05 am
Wednesday, January 31 | 11:05am - 11:45am
Location: Great America 3
Wednesday, 11:05am - 11:45am
Mondeep Thiara (Senior Director Product Marketing, Rambus)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 11:05am - 11:45am
Location: Mission City Ballroom M1
Wednesday, 11:05am - 11:45am
Todd Westerhoff (VP, Semiconductor Relations, SiSoft)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 11:05am - 11:45am
Location: Great America Meeting Room 2
Wednesday, 11:05am - 11:45am
Steve Sandler (Founder and CEO, Picotest)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 11:05am - 11:45am
Location: Great America 1
Wednesday, 11:05am - 11:45am
Steve Sekel (400G Solutions Specialist, Internet Infastructure Solutions, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 2:00 pm
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom F
Wednesday, 2:00pm - 2:40pm
Scotty Neally (Signal Integrity Consultant, Samtec Inc.), Scott McMorrow (CTO Signal Integrity Products, Samtec Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom G
Wednesday, 2:00pm - 2:40pm
Xiangyang Jiao (EMC Design Engineer, Cisco Systems), Ling Zhang (Co-op Student, Missouri University of Science and Technology), Xiao Li (EMC Design Engineer, Cisco Systems), Soumya De (SI Engineer, Cisco Systems), Alpesh Bhobe (EMC Design Manager/Technical Leader, Cisco Systems)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom A
Wednesday, 2:00pm - 2:40pm
Jon Martens (Fellow, Anritsu)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom C
Wednesday, 2:00pm - 2:40pm
Yin Maoxin (Analog Engineer, Intel Corp.), Yinglei Ren (Analog Engineer, Intel Corp.), Yanwu Wang (Analog Engineer, Intel Corp)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
06. Applying PCB Design and Simulation Tools
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom B
Wednesday, 2:00pm - 2:40pm
Bumhee Bae (Senior Engineer, Samsung Electronics), JongWan Shim (Senior Engineer, Samsung Electronics), Younho Kim (Engineer, Samsung Electronics), HyungGeun Kim (Principal Engineer, Samsung Electronics), HarkByeong Park (Principal Engineer, Samsung Electronics)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
01. Signal & Power Integrity at the Single-Multi Die, Interposer, and Packaging Level
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom D
Wednesday, 2:00pm - 2:40pm
Shinyoung Park (Ph.D. Candidate, Korea Advanced Institute of Science and Technology), Jinwook Song (Ph.D. Candidate, Korea Advanced Institute of Science and Technology), Subin Kim (Ph.D. Candidate, Korea Advanced Institute of Science and Technology), Youngwoo Kim (Ph.D. Candidate, Korea Advanced Institute of Science and Technology), Joungho Kim (Professor, Korea Advanced Institute of Science and Technology)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Ballroom E
Wednesday, 2:00pm - 2:40pm
Patrick Casher (VP - Engineering, Lorom)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Great America 3
Wednesday, 2:00pm - 2:40pm
Frank Ferro (Senior Director Product Marketing, Rambus), Joe Rodriguez (Product Marketing Engineer, NW Logic)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Great America Meeting Room 2
Wednesday, 2:00pm - 2:40pm
Gary Giust (Founder and Owner, Jitterlabs)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:00pm - 2:40pm
Location: Mission City Ballroom M1
Wednesday, 2:00pm - 2:40pm
Patrick Connally (Technical Marketing Manager, Teledyne LeCroy), John Wiedemeier (Sr. Product Marketing Manager for Protocol Solutions Group, Teledyne LeCroy)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 2:50 pm
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Great America Meeting Room 2
Wednesday, 2:50pm - 3:30pm
Neil Jarvis (RF and Microwave Applications Engineer, Rohde & Schwarz USA, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom F
Wednesday, 2:50pm - 3:30pm
Bo Pu (Senior Engineer, Samsung Electronics)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
06. Applying PCB Design and Simulation Tools
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom A
Wednesday, 2:50pm - 3:30pm
Davi Correia (Signal Integrity Engineer, Carlisle IT), Stephan Baker (Electrical Consulting Engineer, Simutech), Alexandra Haser (Senior Industry Standards Engineer, Molex), Michael Rowlands (Signal Integrity Engineer, IO Connector Group, Amphenol)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
Advanced
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Great America 3
Wednesday, 2:50pm - 3:30pm
Frank Ferro (Senior Director Product Marketing, Rambus)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom E
Wednesday, 2:50pm - 3:30pm
Clement Luk (Signal integrity engineer, Hirose Electric), Jeremy Buan (Signal Integrity manager, Hirose Electric), Tadashi Ohshida (High Speed Engineering Manager, Hirose Electric), Ping Jen Wang (Signal Integrity Engineer, Hirose Electric), Yuta Oryu (Signal Integrity Engineer, Hirose Electric), Ching-Chao Huang (President, AtaiTec), Neil Jarvis (Application Engineer, Rohde & Schwarz)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom D
Wednesday, 2:50pm - 3:30pm
Nitin Bhagwath (Technical Marketing Engineer, Mentor Graphics), Doug Brooks (President, Ultracad), Joseph Aday (Principal Engineer, Raytheon), Robin Bornoff (Market Development Manager, Mentor Graphics), Praveen Anmula (Product Architect, Mentor Graphics), Robert Carter (Vice President of Business Development and Technology, Oak-Mitsui Technologies), Patrick Carrier (Engineering Planning Manager, Mentor Graphics)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
Introductory
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom B
Wednesday, 2:50pm - 3:30pm
Heidi Barnes (Applications Engineer, Keysight Technologies), Jack Carrel (Applications Engineer, Xilinx), Steve Sandler (Founder and CEO, Picotest)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom C
Wednesday, 2:50pm - 3:30pm
Byunghyun Lee (Senior Engineer, Samsung Electronics), Woncheol Baek (Senior Engineer, Samsung Electronics), Youngsoo Lee (Senior Product Manager, CPS Solutions, ANSYS)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Ballroom G
Wednesday, 2:50pm - 3:30pm
Rick Brooks (Manager, Hardware Engineering, Cisco Systems Inc), Kelvin Qiu (Manager, Hardware Engineering, Cisco Systems Inc), Zao Liu (Staff Design Engineer, Xilinx Inc), Geoff Zhang (Distinguished Engineer and Supervisor, Xilinx Inc)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 2:50pm - 3:30pm
Location: Mission City Ballroom M1
Wednesday, 2:50pm - 3:30pm
Joe Allen (Market Segment Lead for Server & Storage, Tektronix)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday | 3:45 pm
Wednesday, January 31 | 3:45pm - 4:25pm
Location: Great America Meeting Room 2
Wednesday, 3:45pm - 4:25pm
Dr. Chris Scholz (Product Manager, Rohde and Schwarz USA, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Wednesday, January 31 | 3:45pm - 4:25pm
Location: Great America 3
Wednesday, 3:45pm - 4:25pm
Steve Woo (Vice President, Systems and Solutions, Office of the CTO, Rambus)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Format :
40-Minute Technical Session
Wednesday, January 31 | 3:45pm - 5:00pm
Location: Ballroom D
Wednesday, 3:45pm - 5:00pm
David Stauffer (Principal Engineer, Kandou Bus SA), Steve Sekel (400G Solutions Specialist, OIF PLL Interop WG Chair, Keysight Technologies), Ed Frlan (OIF TC Vice Chair, Semtech), Nathan Tracy (OIF VP Marketing, TE Connectivity)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
75-Minute Panel Discussion
Wednesday, January 31 | 3:45pm - 5:00pm
Location: Ballroom C
Wednesday, 3:45pm - 5:00pm
Joe Macri (Corporate Vice President, Product Chief Technology officer and Corporate Fellow, AMD), Bob O'Donnell (President, Founder and Chief Analyst , TECHnalysis Research), Rob Aitken (Fellow & Director of Technology , ARM), Rory McInerney (VP in the Platform Engineering Group and Director of the Server Development Group, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Format :
75-Minute Panel Discussion
Wednesday, January 31 | 3:45pm - 5:00pm
Location: Ballroom G
Wednesday, 3:45pm - 5:00pm
Donald Telian (SI Consultant, SiGuys), Steven Parker (Principal Member of Technical Staff, Global Foundries), Todd Westerhoff (VP, Semiconductor Relations, SiSoft), Stephen Scearce (Hardware Engineering Manager, Cisco Systems), Ken Willis (Product Engineering Architect, Cadence Design Systems), Michael Mirmak (Senior SI Technical Lead, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
02. Mixed Signal Modeling: Algorithmic and Simulation Solutions
Audience Level :
All
Format :
75-Minute Panel Discussion
Wednesday, January 31 | 3:45pm - 5:00pm
Location: Ballroom F
Wednesday, 3:45pm - 5:00pm
Pavel Zivny (Domain Expert, Tektronix), Adee Ran (Principal Engineer, Intel), Greg LeCheminant (Engineer, Keysight Technologies), Cathy Liu (R&D Director, Broadcom Limited), Eldad Bar-Lev (Staff Signal Integrity Engineer, Marvell Israel Ltd.), Richard Mellitz (Principal Engineer, Samtec)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
All
Format :
75-Minute Panel Discussion
Thursday | 8:00 am
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom B
Thursday, 8:00am - 8:45am
Larry Smith (Principal Engineer, Qualcomm), Yi Cao (Staff Engineer, Qualcomm)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom G
Thursday, 8:00am - 8:45am
Haitao (Tony) Xia (Distiguished Engineer, Broadcom Limited), Aravind Nayak (Principle Engineer, Broadcom Limited), Haotian Zhang (Principle Engineer, Broadcom Limited), Jun Yao (Staff Engineer, Etopus), Bruce Wilson (Director, Broadcom Limited)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom D
Thursday, 8:00am - 8:45am
Hong Shi (Director, Package Development, Xilinx), Siow Chek Tan (., Xilinx Inc), Yohan Frans (., Xilinx, Inc), Hongtao Zhang (., Xilinx, Inc.), Jack Carrel (., Xilinx,Inc), Sai Lalith Chaitanya Ambatipudi (., Xilinx, Inc.), David Mahashin (., Xilinx, Inc)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom F
Thursday, 8:00am - 8:45am
Hsinho Wu (Design Engineer, Intel Corp.), Masashi Shimanouchi (Design Engineer, Intel Corp.), Mike Peng Li (Fellow, Intel Corp.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom E
Thursday, 8:00am - 8:45am
Alex Manukovsky (Technical lead, SI/PI team, Intel), Zurab Khasidashvili (Senior software engineer, Intel), Yaron Juniman (Senior SI Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 8:00am - 8:45am
Location: Ballroom A
Thursday, 8:00am - 8:45am
Antonio Ciccomancini Scogna (Principal Engineer, Samsung), Nitin Srivastava (Senior Engineer, Samsung Electronics), Junho Lee (Principal Engineer, Samsung Electronics), Hwanwoo Shim (Principal Engineer, Samsung Electronics)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday | 8:30 am
Thursday, February 1 | 8:30am - 9:10am
Location: Great America 1
Thursday, 8:30am - 9:10am
Brian Fetz (Senior Solutions Manager for Display and Measurement Technologies , Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 8:30am - 9:10am
Location: Great America 3
Thursday, 8:30am - 9:10am
Soumya De (SI Engineer, Cisco Systems), Yaochao Yang (Principal Engineer/Technical Director , Cisco Systems Inc.), Han Gao (SI Engineer, Cisco), Miroslav Grubic (SI Engineer, Cisco), An-Yu Kuo (Sr. Group Director, Cadence), Jian Liu (SI Engineer, Cadence)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 9:00 am
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom B
Thursday, 9:00am - 9:45am
Hakki Torun (PhD Candidate, Georgia Institute of Technology), Madhavan Swaminathan (John Pippin Chair Professor, Georgia Institute of Technology)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom C
Thursday, 9:00am - 9:45am
Torsten Reuschel (Research Assistant, Hamburg University of Technology), Jayaprakash Balachandran (Technical Lead, Cisco Systems Inc), Ömer Yildiz (Research Assistant, Hamburg University of Technology), Cristian Filip (Product Marketing Manager, Mentor Graphics), Nitin Bhagwath (Technical Marketing Manager, Mentor Graphics), Bidyut Sen (Principal Engineer, Cisco Systems Inc), Christian Schuster (Professor / Head of Institute, Hamburg University of Technology)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom G
Thursday, 9:00am - 9:45am
Istvan Novak (Senior Principle Engineer, Oracle), Alejandro ‘Alex’ Miranda (Senior Hardware Engineer, Oracle)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
Introductory
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom D
Thursday, 9:00am - 9:45am
Changyi Su (design engineer, Xilinx), Hing Y "Thomas" To (Technical Director, Xilinx), Yong Wang (Sr. Director, Xilinx)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
07. Advanced IO Interface Design for Memory and 2.5D/3D/SiP Integrations
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom A
Thursday, 9:00am - 9:45am
Mehdi Mechaik (Staff Application Engineer, Cadence Design Systems), Blake Bader (Application Engineer Director, Cadence Design Systems)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom F
Thursday, 9:00am - 9:45am
Robert Carter (Vice President of Business Development and Technology, Oak-Mitsui Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
05. Advances in Materials and Processing for PCBs, Modules, and Packages
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 9:00am - 9:45am
Location: Ballroom E
Thursday, 9:00am - 9:45am
Alex Manukovsky (Technical lead, SI/PI team, Intel), Yaron Juniman (Senior SI Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
45-Minute Technical Session
Thursday | 9:20 am
Thursday, February 1 | 9:20am - 10:00am
Location: Great America 3
Thursday, 9:20am - 10:00am
Chung Huang (Design Engineering Director, Cadence), Zhen Mu (Product Engineering Architect, Cadence)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 9:20am - 10:00am
Location: Great America 1
Thursday, 9:20am - 10:00am
Rick Eads (Principal PCI Express Program Manager, Internet Infastructure Solutions, Keysight Technologies), Pegah Alavi (Senior Applications Engineer, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 10:00 am
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom E
Thursday, 10:00am - 10:45am
Brent Rothermel (Hardware Engineer, Intel Corporation), Jeremy Stephens (Principal Engineer, Intel Corporation), Chien-Ping Kao (Sr. Signal and Power Integrity Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom B
Thursday, 10:00am - 10:45am
Todd Westerhoff (VP, Semiconductor Relations, SiSoft), Doug Burns (VP, Consulting, SiSoft), Eric Brock (Principal Member of Technical Staff , SiSoft)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
02. Mixed Signal Modeling: Algorithmic and Simulation Solutions
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom F
Thursday, 10:00am - 10:45am
Ken Willis (Product Engineering Architect, Cadence Design Systems), Kumar Keshavan (Senior Software Architect, Cadence Design Systems), Ambrish Varma (Senior Principal Software Engineer, Cadence Design Systems)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom C
Thursday, 10:00am - 10:45am
Nitin Bhagwath (Technical Marketing Engineer, Mentor Graphics), Randy Wolff (Principal Engineer, Micron), Vladimir Dmitriev-Zdorov (Principal Engineer, Mentor Graphics), Shinichiro Ikeda (Manager of Custom SoC Development, Socionext), Arpad Muranyi (Principal Engineer, Mentor Graphics), Chuck Ferry (Product Marketing Manager, Mentor Graphics), Eiji Fujine (Hardware Engineer, Socionext), Ryo Shibata (Hardware Engineer, Socionext), Yumiko Sugaya (Hardware Engineer, Socionext), Megumi Ono (Hardware Engineer, Socionext)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
07. Advanced IO Interface Design for Memory and 2.5D/3D/SiP Integrations
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom A
Thursday, 10:00am - 10:45am
Hansel Dsilva (Signal Integrity Engineer, Intel, Corporation), Se-Jung Moon (Senior Hardware Engineer, Intel, Corporation), Xiaoning Ye (Principal Engineer, Intel, Corporation), Michael Brownell (Technical Lead, Intel, Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom D
Thursday, 10:00am - 10:45am
Yuchun Lu (Senior Engineer, Huawei Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 10:00am - 10:45am
Location: Ballroom G
Thursday, 10:00am - 10:45am
Greg LeCheminant (Engineer, Keysight Technologies), David Leyba (Engineer, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
03. Integrating Photonic and Electronic Signaling
Audience Level :
All
Format :
45-Minute Technical Session
Thursday | 10:15 am
Thursday, February 1 | 10:15am - 10:55am
Location: Great America Meeting Room 2
Thursday, 10:15am - 10:55am
Hiroshi Goto (Digital/Optical Business Development Manager, Anritsu)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 10:15am - 10:55am
Location: Great America 3
Thursday, 10:15am - 10:55am
John Park (Product Management Director, Cadence)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 10:15am - 10:55am
Location: Great America 1
Thursday, 10:15am - 10:55am
Mike Resso (Signal Integrity Application Scientist, Keysight Technologies), Chun-ting "Tim" Wang Lee (Application Engineer for High Speed Digital applications in the EEsof EDA Group, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 11:00 am
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom F
Thursday, 11:00am - 11:45am
Tim Hollis (Distinguished Member of the Technical Staff – Signal Integrity R&D Lead, Micron Technology, Inc.), Salman Jiva (Sr. Business Development Mgr – Compute / Networking Business Unit, Micron Semiconductor Products), Martin Brox (Fellow - Design, Micron Semiconductor GmbH), Wolfgang Spirkl (Distinguished Member of the Technical Staff – Product Engineering, Micron Semiconductor GmbH), Thomas Hein (Senior Member of the Technical Staff - Design, Micron Semiconductor GmbH), Dave Ovard (Senior Member of the Technical Staff – Signal Integrity R&D, Micron Technology, Inc.), Roy Greeff (Senior Member of the Technical Staff – Signal Integrity R&D, Micron Technology, Inc.), Dan Lin (Senior Member of the Technical Staff – Signal Integrity R&D, Micron Technology, Inc.), Michael Richter (Principal Engineer - Design, Micron Semiconductor GmbH), Peter Mayer (Principal Engineer – Product Engineering, Micron Semiconductor GmbH), Walt Moden (Principal Engineer – Package Design, Micron Technology, Inc.), Maksim Kuzmenka (Senior Engineer - Design, Micron Semiconductor GmbH), Mani Balakrishnan (Senior Engineer - Design, Micron Semiconductor GmbH), Milena Ivanov (Senior Engineer - Design, Micron Semiconductor GmbH), Manfred Plan (Senior Engineer - Design, Micron Semiconductor GmbH), Marcos Alvarez Gonzalez (Senior Engineer – Product Engineering, Micron Semiconductor GmbH), Bryce Gardiner (Senior Engineer – System Signal Integrity, Micron Technology, Inc.), Dong Soon Lim (Senior Engineer – Package Signal Integrity, Micron Technology, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
07. Advanced IO Interface Design for Memory and 2.5D/3D/SiP Integrations
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom G
Thursday, 11:00am - 11:45am
Jose Moreira (Senior Staff Engineer, Advantest), Heidi Barnes (Senior Application Engineer, Keysight Technologies), Eric Bogatin (Dean, Teledyne LeCroy Signal Integrity Academy, Teledyne LeCroy), Mikheil Tsiklauri (Research Associate Professor, Missouri University of Science and Technology), Ching-Chao Huang (President, Ataitec), Jim Nadolny (Engineering Manager, Samtec), Jason Ellison (Signal Integrity Engineer, The Siemon Company), Se-Jung Moon (Senior Hardware Engineer, Intel), Volker Herrmann (RF & Microwave Senior Application Engineer, Rohde & Schwarz)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom B
Thursday, 11:00am - 11:45am
Michael Degerstrom (Electical Engineer, Mayo), Chad Smutzer (Senior Engineer, Mayo Clinic), Christopher White (Senior Engineer, Mayo Clinic), Barry Gilbert (Director, Mayo Clinic), Clifton Haider (Deputy Director, Mayo Clinic)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
06. Applying PCB Design and Simulation Tools
Audience Level :
All
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom A
Thursday, 11:00am - 11:45am
Alexander Hanchett (WW Product Marketing, High Speed Signal Conditioning, Texas Instruments), Yongyao Li (Principle Engineer, Huawei), Casey Morrison (Systems Engineering Manager, Texas Instruments), Fangyi Rao (Master R&D Engineer, Keysight), Hong Ahn (SerDes Technology Group, Xilinx), Van Zhu (Senior Integrity Engineer, Huawei), Cindy Cui (Application Engineer , Keysight), Geoff (Geoffrey) Zhang (Distinguished Engineer , Xilinx), Khalid Jakoush (Application Engineer, Texas Instruments)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
14. Modeling and Analysis of Interconnects
Audience Level :
Advanced
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom D
Thursday, 11:00am - 11:45am
Greg Edlund (Senior Engineer, IBM), Mehdi Mechaik (Staff Application Engineer, Cadence Design Systems), Ken Willis (Product Engineering Architect, Cadence Design Systems), Ambrish Varma (Senior Principal Software Engineer, Cadence Design Systems), Kumar Keshavan (Senior Software Architect, Cadence Design Systems)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
09. Measurement, Simulation, and Optimization of Jitter, Noise, and Timing to Minimize Errors
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom E
Thursday, 11:00am - 11:45am
Vladimir Dmitriev-Zdorov (Principal Engineer, Mentor Graphics, A Siemens Business), Pablo Acosta (Staff Design Engineer, Analog Devices, Inc), Ingvar Karlsson (Senior Specialist Signal Integrity for Ericsson AB, Ericsson AB), Cristian Filip (Marketing Manager, Mentor Graphics, A Siemens Business), Chuck Ferry (Product Marketing Manager, Mentor Graphics, A Siemens Business), Mikael Stahlberg (Euro Application Engineer, Mentor Graphics, A Siemens Business)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Intermediate
Format :
45-Minute Technical Session
Thursday, February 1 | 11:00am - 11:45am
Location: Ballroom C
Thursday, 11:00am - 11:45am
Sayed Mobin (Senior Manager, Western Digital), Cindy Cui (Application Engineer , Keysight)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
45-Minute Technical Session
Thursday | 11:05 am
Thursday, February 1 | 11:05am - 11:45am
Location: Great America Meeting Room 2
Thursday, 11:05am - 11:45am
James Morgante (Anritsu Field Application Engineer, Anritsu)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 11:05am - 11:45am
Location: Great America 1
Thursday, 11:05am - 11:45am
Perry Keller (Lead Digital Applications and Standards Program, Memory Applications Program Manager, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 11:05am - 11:45am
Location: Great America 3
Thursday, 11:05am - 11:45am
Jack Stone (Senior Signal and Power Integrity Engineer, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 2:00 pm
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom A
Thursday, 2:00pm - 2:40pm
Rick Eads (Engineer, Keysight Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
09. Measurement, Simulation, and Optimization of Jitter, Noise, and Timing to Minimize Errors
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom E
Thursday, 2:00pm - 2:40pm
Gert Havermann (Signal Integrity Engineer, HARTING AG&Co.KG)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Great America 3
Thursday, 2:00pm - 2:40pm
Abby Wei-Chien Chou (Senior Engineer, Foxconn), Daniel Ying-Tso Lai (Senior Deputy Manager, Foxconn), Gino Chun-Jen Chen (Senior Deputy Manager, Foxconn)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom C
Thursday, 2:00pm - 2:40pm
Shayan Shahramian (Analog/System IC Design Engineer, Huawei Canada – HiLink), Behzad Dehlaghi (Analog/System IC Design Engineer, Huawei Canada – HiLink), Yue Yin (MASc Candidate, University of Toronto), Rudy Beerkens (Staff Engineer, Huawei Canada – HiLink), David Cassan (Technical Director, Huawei Canada – HiLink), Davide Tonietto (Director of SerDes Development, Huawei Canada – HiLink), Anthony Chan Carusone (Professor, University of Toronto)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom B
Thursday, 2:00pm - 2:40pm
Mike Resso (Signal Integrity Applications Scientist, Keysight Technologies), Davi Correia (Senior Signal Integrity Engineer, Carlisle Interconnect Technologies)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
08. Optimizing High-Speed Serial Design
Audience Level :
Advanced
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom F
Thursday, 2:00pm - 2:40pm
Nathan Tracy (Technologist, TE)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Ballroom G
Thursday, 2:00pm - 2:40pm
Qiaolei Huang (PhD student, Missouri Univ of Sci& Tech), Yuan Chen (Master Student, Missouri Univ of Sci& Tech), Chulsoon Hwang (Assistant Professor, Missouri Univ of Sci& Tech), Jun Fan ( Professor, Missouri Univ of Sci& Tech)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Great America Meeting Room 2
Thursday, 2:00pm - 2:40pm
Patrick Connally (Technical Marketing Manager, Teledyne LeCroy)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:00pm - 2:40pm
Location: Mission City Ballroom M1
Thursday, 2:00pm - 2:40pm
David Rodgers (Sr. Product Marketing Manager, Teledyne LeCroy)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 2:50 pm
Thursday, February 1 | 2:50pm - 3:30pm
Location: Great America 3
Thursday, 2:50pm - 3:30pm
Xingjian Kinger Cai (Engineering Manager, Intel), Jimmy Hsiao (Hardware Power Customer Engineer, Intel), Denis Chen (PAE SI/PI Engineer, Intel), Chi-te Chen (Staff Power Integrity Engineer, Intel), Yun Ling (Sr. Principle Engineer, Intel), Steven Yun Ji (Sr. Manager Engineering, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom F
Thursday, 2:50pm - 3:30pm
Ling Yang (Design Engineer, Xilinx Inc), KangWei Lai (Director of Engineer, Xilinx Inc.), Anusha Prakash (Application Engineer, Ansys)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
01. Signal & Power Integrity at the Single-Multi Die, Interposer, and Packaging Level
Audience Level :
All
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Great America Meeting Room 2
Thursday, 2:50pm - 3:30pm
Mike Engbretson (Chief Technical Engineer, Granite River Labs)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom B
Thursday, 2:50pm - 3:30pm
Xiaoqing Dong (System engineer, Huawei Technologies), Geoff (Geoffrey) Zhang (Distinguished Engineer , Xilinx), Chunxing Huang (System Engineer, Shenzhen Zhongzeling Electronics Co., Ltd.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
10. High-Speed Signal Processing, Equalization, and Coding
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom G
Thursday, 2:50pm - 3:30pm
Maria Agoston (Principal Engineer, Tektronix), Pavel Zivny (Domain Expert, Tektronix), Richard Mellitz (Principal Engineer, Samtec), Kan Tan (Principal Engineer, Tektronix), Jan Peeters Weem (Principal Engineer, Tektronix)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
09. Measurement, Simulation, and Optimization of Jitter, Noise, and Timing to Minimize Errors
Audience Level :
Advanced
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom C
Thursday, 2:50pm - 3:30pm
Hongtao Zhang (Senior Staff Design Engineer, Xilinx), Fangyi Rao (Master R&D Engineer, Keysight Technologies), Geoff Zhang (Distinguished Engineer and Supervisor, Xilinx)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
02. Mixed Signal Modeling: Algorithmic and Simulation Solutions
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom A
Thursday, 2:50pm - 3:30pm
Istvan Novak (Senior Principle Engineer, Oracle), Peter Pupalaikis (Vice President of Technology Development, Teledyne LeCroy), Lawrence Jacobs (Manager, Probe Development Group, Teledyne-LeCroy)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
Introductory
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom D
Thursday, 2:50pm - 3:30pm
Aruna Bathini (Analog Engineer, Intel corporation), Anoop Karunan (Technical Lead and Manager, Intel), Manjunath J (Analog Engineer, Intel Corporation), Aruna Kumar (Senior Analog Design Engineer, Intel Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
12. Electromagnetic Compatibility and Mitigating Interference
Audience Level :
Advanced
Format :
40-Minute Technical Session
Thursday, February 1 | 2:50pm - 3:30pm
Location: Ballroom E
Thursday, 2:50pm - 3:30pm
Alex Waizman (Sr. PE, Intel Corporation), Vishram Pandit (Platform Architect, Intel Corporation), Martin Peterburg Alzaradel (Senior Analog Engineer , Intel), Vijay Kasturi (Sr. Analog Engineer, Intel Corporation)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday | 3:45 pm
Thursday, February 1 | 3:45pm - 4:25pm
Location: Great America 3
Thursday, 3:45pm - 4:25pm
Randy Wolff (Principal Engineer, Micron)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
Sponsored Session (Free)
Audience Level :
Intermediate
Format :
40-Minute Technical Session
Thursday, February 1 | 3:45pm - 5:00pm
Location: Ballroom C
Thursday, 3:45pm - 5:00pm
Paul Brooks (Lab & Production Business Unit, Viavi Solutions), David Rodgers (Ethernet Alliance Marketing Chair, Sr. Product Marketing Manager, Teledyne LeCroy), Pavel Zivny (Domain Expert, Tektronix), Ed Sayre (Distinguished System Engineer, Samtec)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
13. Applying Test and Measurement Methodology
Audience Level :
All
Format :
75-Minute Panel Discussion
Thursday, February 1 | 3:45pm - 5:00pm
Location: Ballroom D
Thursday, 3:45pm - 5:00pm
Bill Hargin (Director of US Marketing, Nan Ya CCL), Lee Ritchey (President, Speeding Edge), Scott McMorrow (CTO Signal Integrity Products, Samtec Inc.), Stephen Scearce (Hardware Engineering Manager, Cisco Systems), Amendra Koul (Technical Leader - Signal Integrity, Cisco systems inc), David Hoover (Sr Field Application Engineer - Communications & Computing Business , TTM Technologies, Inc.)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
08. Optimizing High-Speed Serial Design
Format :
75-Minute Panel Discussion
Thursday, February 1 | 3:45pm - 5:00pm
Location: Ballroom F
Thursday, 3:45pm - 5:00pm
Bradley Brim (Sr Staff Prod Engr, Cadence Design Systems), Istvan Novak (Senior Engineer, Oracle), Shoji Tsubota (Engineering Manager, Murata), Katsufumi EHATA (Assistant Manager, TDK Corporation), Masayuki Shimizu (Sr.Product Engineering Manager(FAE), TAIYO UDEN CO.,LTD), Tom De Muer (Principal Software Architect EM Technology and Products, Keysight Technologies, Keysight EEsof EDA Division), Robert (Soung-Ho) Myoung (Solution Architect - CPS, ANSYS)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
11. Power Integrity in Power Distribution Networks
Audience Level :
All
Format :
75-Minute Panel Discussion
Thursday, February 1 | 3:45pm - 5:00pm
Location: Ballroom G
Thursday, 3:45pm - 5:00pm
Amal Ekbal (Senior Wireless Platform Architect, National Instruments), Antonio Ciccomancini Scogna (Principal Engineer, Samsung Electronics), Jose Moreira (Senior Staff Engineer, Advantest), Michael Thompson (RF Solutions Architect, Cadence), Patrick Mannion (Founder and Managing Director, ClariTek), Will Sitch (Director of Industry and Solutions Marketing, Keysight), Minnie Ho (Sr Principal Engineer and Core Technical Lead, Intel)
Pass Types :
2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass
Track :
04. System Co-Design: Modeling, simulation and measurement validation
Format :
75-Minute Panel Discussion