Super Early Bird Registration Now Open till October 12th. Save Up to $400 Today!

DDR5 Modeling Using Automated IBIS-AMI Modeling Technology

Randy Wolff (Principal Engineer, Micron)

Location: Great America 3

Date: Thursday, February 1

Time: 3:45pm - 4:25pm

Pass Type: 2-Day Pass, All Access Pass, Alumni All Access Pass, Boot Camp Pass, Expo Pass - Get your pass now!

Track: Sponsored Session (Free)

Audience Level: Intermediate

Format: 40-Minute Technical Session

Vault Recording: Not Recorded

Audience Level: Intermediate

Cadence Design Systems

With increases in speed and decreases in voltage swing, DDR5 technology is being designed with equalization techniques to support low bit-error rates. One technique for modeling the equalization is to use the industry-standard IBIS-AMI model. System designers are asking memory providers to supply simulation models before the DDR5 specification has been completed and before silicon is available for correlation. In order to avoid spending time writing custom code to create the dynamic link library file (.dll) that is part of an IBIS-AMI model, this paper will discuss how automated tools give memory providers the flexibility needed to provide early access to DDR5 simulation models.