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LPDDR4X (4266 Mbps) FOWLP-PoP vs Conventional-PoP Co-SI/PI System Analysis

Sunil Gupta (Ph.D., Qualcomm Technologies, Inc.)

Will Navaja (Staff, Qualcomm Technologies, Inc.)

Patrick Zilaro (Senior Staff, Qualcomm Technologies, Inc.)

Location: Ballroom C

Date: Wednesday, January 31

Time: 10:00am - 10:45am

Pass Type: 2-Day Pass, All Access Pass, Alumni All Access Pass - Get your pass now!

Track: 04. System Co-Design: Modeling, simulation and measurement validation

Audience Level: All

Format: 45-Minute Technical Session

Vault Recording: TBD

Audience Level: All

LPDDR4X Co-SI/PI analysis comparing FOWLP-PoP (Fan-Out Wafer Level Package-PoP) vs Conventional-PoP in mobile SoC-DRAM system is presented. FOWLP-PoP offers thin packaging, improved system performance using wafer RDL process.

Thinner dielectric translates into smaller vias and smaller loop inductance, leading to lowered system PDN impedance. Frequency-domain PDN analysis show peak impedance was ~25% lower in FOWLP-PoP compared to Conventional-PoP system.

FOWLP-PoP package exhibits lowered NEXT and FEXT reducing coupling between the traces. Time-domain Co-SI/PI analysis depicts on average DQ eye-apertures bigger by ~5% in FOWLP-PoP system. System was operating at 0.57V VDDQ, VOH=~340mV and data rate of 4266 Mbps.


  1. What is FOWLP-PoP (Fan-Out Wafer Level Package-PoP) and comparison with substrate based Conventional-PoP.
  2. FOWLP-PoP impact on Frequency-domain SoC-DRAM system PDN.
  3. FOWLP-PoP impact on time-domain eye-apertures in LPDDR4X.
  4. FOWLP-PoP impact on crosstalk reduction in LPDDR4X system.
  5. Benefits and drawbacks of FOWLP-PoP over Conventional-PoP.