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PDO Methodology to Verify SI and Reduce EMI Risks in Mobile Devices

Antonio Ciccomancini Scogna (Principal Engineer, Samsung)

Nitin Srivastava (Senior Engineer, Samsung Electronics)

Junho Lee (Principal Engineer, Samsung Electronics)

Hwanwoo Shim (Principal Engineer, Samsung Electronics)

Location: Ballroom A

Date: Thursday, February 1

Time: 8:00am - 8:45am

Pass Type: 2-Day Pass, All Access Pass, Alumni All Access Pass - Get your pass now!

Track: 12. Electromagnetic Compatibility and Mitigating Interference

Audience Level: Intermediate

Format: 45-Minute Technical Session

Vault Recording: TBD

Audience Level: Intermediate

A pre-design optimization (PDO) methodology to verify signal integrity and EMI of printed circuit boards (PCBs) in mobile devices is proposed. Design of Experiments (DoE) based on response surface model (RSM) and Taguchi model are constructed for impedance, interconnect loss and eye diagrams using modeled data (correlated against measurements).
A library of parametric models for high speed differential lines (DL) such as USB, PCIe and MIPI is developed. Each model provides a large space of variables including type of interconnects, dimensions, material properties, driver settings and manufacturing tolerance. EMI victims and interference modes are identified and radiation mechanisms in DL paired with serpentine is studied.
An understanding on the sensitivity of various parameters and statistical probability of occurrence of failures is provided.


The proposed methodology can be used at very early design stage to optimize PCB layout and reduce SI&EMI risks. DoE is used to study variation of several variables including interconnects, stack-up and driver settings. A parametric library of models is created by selecting different regions on the PCB with similar electromagnetic behavior. The method allows to optimize the most common interfaces in mobile devices based on the speed of operation.
Several applications are used to verify how using the proposed pre-design methodology can save last minute debug analysis and quick fix solutions.