• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Tutorial – A Step by Step Guide for Channel Modeling & Simulation That Correlates to Lab Measurement for 25Gb NRZ & 56Gb PAM4 Applications

Location: Ballroom D
Pass Types: All Access Pass, Alumni All Access Pass - Get your pass now!
Track: 08. Optimizing High-Speed Serial Design
Audience Level: All
Format: 3-Hour Tutorial
Audience Level: All
Recording: TBD

Predictive channel simulation becomes a challenging task as frequencies increase and compliance requirements become stricter. This work presents a step by step practical guide on the modeling and simulation of high-speed channels achieving a tight correlation to lab measurement for 25 Gb NRZ and 56 Gb PAM4 application. We will present a case study to provide an insight on how to correctly model each channel segment with respect to its main effect in the post layout simulation process. We will discuss common pitfalls in modeling, and go over manufacturing considerations. We will survey the required lab measurements for enabling correlation work and measurement based modeling.


This work presents A step by step Guide for channel modeling and simulation that correlates to lab measurement for 25Gb NRZ and 56Gb PAM4 applications .We'll examine a case study to provide an insight on how to successfully implement some of the latest channel modeling techniques in practice (such as copper roughness and frequency dependent dielectric properties), considering the information available to SI engineers at different stages of the development cycle. It will provide an overview on how to correctly model the system with respect to the main effects of each segment of the model, and the accuracy requirement in the work, in order to accurately predict the expected channel behavior, and get a tight correlation to the post manufacturing lab measurements.
We will discuss common pitfalls in modeling: channel modeling aspects that are usually neglected by the signal integrity engineers although having significant effect on performance, such as copper balance.
We will go over the required lab measurements for enabling correlation work and measurement based modeling, and provide the crucial details on how to carry out such measurements in real life scenarios.
A post manufacturing analysis will be carried out to identify the differences between the predicted model and the manufactured channel. We will provide some guidance in understanding what went wrong, which effect was incorrectly modeled, which channel segment, and how to close these gaps

Intended Audience

S parameters basics ,Transmission line basics