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DesignCon 2019 Presentation Viewer

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Welcome to the DesignCon Presentation Store. Here you can view and download conference and/or show floor theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, note that it’s likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.

If you’d like to do a bulk download of all conference presentations or technical papers at once, please click here for conference presentations or click here for full technical papers. For sessions not included in the main conference, click here for Chiphead Theater presentations or click here for sponsored session presentations.

Roee BlochHi Speed EngineerIntel

Roee Bloch is Technical leader at conformance Team, responsible for compliance testing at 56GB/s PAM-4, 100GB/s NRZ, PCIe Gens 1-4, researching for new technologies and new test equipment that will be suitable for next generation of future products. Doing also simulation using HFSS and other tools such as ADS, Simbeor High Speed simulators He has more than 5 years of experience in signal integrity, system simulation, system testing, PCB design and validation. He is also Instructor at Technion in Several courses such as: Logic Systems, Assembler 8086, computer structures, Quartus simulation and TTL Lab. He received his B.Sc. from the Holon Institute of Technology at 2009