Early Bird Registration Now Open till November 30th. Save Up to $300 Today!

DesignCon 2019 Presentation Viewer

Welcome to the DesignCon Presentation Store. Here you can view and download conference and/or show floor theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, note that it’s likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.

Karthik ChandrasekarSr. SI/PI EngineerIntel PSG

Karthik Chandrasekar finished his PhD degree in computer engineering from North Carolina State University, with his PhD dissertation focused on RF modeling/characterization of Spiral transformers and SI/PI channel simulation for deploying inductively coupled backplane connectors in high speed SERDES links. He worked as a package technical lead for three and half years in the substrate system design group at Nvidia,Santa Clara. He has played various different roles in the IC Engineering division at Altera ranging from full chip power analysis to leading 2.5D/3D heterogeneous integration strategic initiatives to managing CAD teams to deliver circuit simulation and back end EDA flows to chip design teams. He is currently working as a Signal/Power integrity engineer in the hardware division at Intel PSG with his focus being on DDR/LVDS Timing and EDA flows for PDN modeling.