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Janani ChandrasekharSIPI Engineer Intel

Janani Chandrasekhar is a SIPI Engineer at the Package and Platform Team at Programmable Solutions Group in Intel. Her responsibilities include core power, 2.5 EMIB and memory IO power integrity, system power delivery and chip-package-board co-design efforts. Prior to this she also has published papers on DDR4/DDR3 memory SI/PI simulation and correlation, SERDES high speed power integrity at various conferences. She holds a MS in Electrical and Computer Engineering from Georgia Institute of Technology.

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