• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    Center
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Eiji Fujine, Hardware Engineer, Socionext

Eiji Fujine is a hardware engineer at Socionext Inc. He is qualified as an iNARTE EMC engineer in 2015. After working as a CAD software engineer and a LSI-PKG-Board(LPB) co-Design engineer at Fujitsu VLSI, he works in DDR design methodology at Socionext since 2015. He graduated in 1991 from the University of Mie in Japan with a BSEE degree.


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