• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    Center
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Ashkan Hashemi, SI/PI engineer, Intel

Ashkan Hashemi is an SoC design engineer at Intel Programmable Solution Group (PSG). His responsibility includes signal/power integrity-related design and analysis of flagship FPGAs products as well as Intel PSG synergy products. He received the B.Sc. degree in electrical engineering from IAU, Iran, in 2007, the M.Sc. degree in electronics design from Mid Sweden University, Sundsvall, Sweden, in 2012, and the Ph.D. degree in electrical engineering from the Missouri University of Science and Technology (Missouri S&T), Rolla, MO, USA, in 2016.


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