• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Manjunath J, Analog Engineer, Intel Corporation

Manjunath is currently an Analog engineer at Intel Corporation. He works on power delivery and signal Integrity modeling, analysis, and design for high-speed interfaces. His main interest includes on-chip power delivery, high-speed system-level power integrity, signal integrity / Power integrity co-design, power supply induced Jitter analysis & Platform BOM cost reduction from SI/PI.