• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Aruna Bathini, Analog Engineer, Intel corporation

Aruna Bathini is currently Analog Engineer at Intel corporation. She works on Signal Integrity analysis, modeling, design for high speed serial interfaces. Her area of Interest includes Signal Integrity, Power delivery, Signal and Power integrity co-design, Supply noise & jitter analysis, BOM cost reduction techniques on SI/PI.