DesignCon is part of the Informa Markets Division of Informa PLC

This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 8860726.

Early Bird Registration Now Open till November 30th. Save Up to $300 Today!


DesignCon 2019 Presentation Viewer

Purchase procecdings

Welcome to the DesignCon Presentation Store. Here you can view and download conference and/or show floor theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, note that it’s likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.

If you’d like to do a bulk download of all conference presentations or technical papers at once, please click here for conference presentations or click here for full technical papers. For sessions not included in the main conference, click here for Chiphead Theater presentations or click here for sponsored session presentations.

Adee RanPrincipal EngineerIntel

Adee Ran is a Principal Engineer at Intel Corporation, a technical leader of high-speed SerDes architecture, specification and modeling activities. He is an active participant and contributor in several projects within the IEEE 802.3 Ethernet Working Group since 2008, and was a member of the editorial team in the IEEE P802.3by (25 Gb/s Ethernet) and P802.3cd (50 Gb/s, 100 Gb/s, and 200 Gb/s Ethernet) Task Forces, focusing on electrical specifications. Adee is one of the developers of the channel operating margin (COM) method for channel specification with respect to reference transmitter and receiver parameters. He holds numerous patents in the field and has authored several papers and conference presentations.

Presenting: