• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

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Michael Rowlands, Signal Integrity Engineer, IO Connector Group, Amphenol

Michael Rowlands is a Signal Integrity Engineer in the IO Connector group at Amphenol. He specializes in signal integrity at multi-gigahertz frequencies. He received a Bachelor's and Master's degree in Electrical Engineering from MIT in 1998. Upon graduation, he worked four years as a signal integrity engineer at Teradyne in Boston. He designed cable assemblies, circuit boards and interconnects for test equipment up to 6 GHz. In 2002, he worked at a startup company in Illinois. The company designed dispersion compensation microchips at 12.5 Gbps for fiber-optic communications. He designed circuit boards to demonstrate and verify 12.5Gbps performance and made algorithm improvements based on system modeling. In 2005, as part of the Research and Development at Endicott Interconnect Technologies years he designed and analyzed circuit boards, chip packages and custom computing systems. Starting in 2009, he worked at Molex designing next-generation 25-40Gbps I/O and board-to-board connectors. In 2015, he led a team which won the Molex Innovation Challenge business competition. He holds multiple patents in multi-gigahertz signal design. Since 2017, in the connector group at Amphenol, he's worked on 56Gbps and 112Gbps designs. He has authored and presented technical papers at ECTC, DesignCon, IMAPS, IPC-APEX and PCB East; winning a DesignCon Best Paper Award in 2014 for "Quantitative EMI Analysis of Electrical connectors Using Simulation Models."