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Parag UpadhyayaDirector, SERDES Technology GroupXilinx Inc

Parag Upadhyaya (S'00 - M'07) received the B.S., M.S. and Ph.D. degrees in electrical engineering from Washington State University in 2000, 2005 and 2008, respectively. From 2001 and 2003, he was with Cypress Semiconductor working on development of high speed wireline & optical transceivers. Since 2008, he has been with Xilinx Inc. where he is currently a Director of Engineering with the SERDES technology group leading development of high-speed transceivers for FPGA application. He has authored or co-authored over 54 journal, conference, and book chapter publications. He hold 27+ US patents. His interest includes high speed mixed signal circuits for wireline, wireless & optical transceivers, high speed data converters and PLLs.