• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Ambrish Varma, Senior Principal Software Engineer, Cadence Design Systems

Ambrish Varma is a senior principal software engineer at Cadence. He is involved in developing signal integrity analysis products for high-speed designs. He received his M.S. and Ph.D. degrees from North Carolina State University, Raleigh. He has published many peer-reviewed papers and conference papers as well as articles in other industry publications. He holds two U.S. patents and five pending U.S. patents. His research interests include signal integrity issues in high-speed circuit design, behavioral modeling, algorithmic modeling of transceivers, digital signal processing, and I/O buffer design.