• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Jun Wang, signal integrity engineer, Ericsson AB

signal integrity engineer for Ericsson AB, joined Ericsson in 2010, working on signal and power integrity analysis. His responsibilities include high speed serial channels modeling, parallel interfaces timing analysis and board level power distribution network design. In his previous assignment, Jun worked for Nortel Networks on SI/PI analysis and high speed circuit design. Jun received his M.Sc. from Beijing University of Aeronautics and Astronautics, Beijing, China in 2008.