• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    | Santa Clara, CA

DesignCon 2018 Schedule Builder

Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.

Build your conference agenda today! By signing up for the Scheduler, you can add sessions to your "Favorites" and develop your own personalized schedule. This personalized schedule will be synced with the official DesignCon Event App.

Todd Westerhoff, VP, Semiconductor Relations, SiSoft

Todd Westerhoff is the VP Semiconductor Relations at SiSoft, and has over 37 years of experience in modeling and simulation, including 20 years of signal integrity experience. Todd is responsible for SiSoft's activities working with semiconductor vendors to test and develop high quality simulation AMI models. Todd has been heavily involved with the IBIS-AMI modeling specification since its inception. He has held senior technical and management positions for Cisco and Cadence and worked as an independent signal integrity consultant. Todd holds a B.E.E.E. degree from the Stevens Institute of Technology in Hoboken, New Jersey.