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DesignCon 2019 Presentation Viewer

Welcome to the DesignCon Presentation Store. Here you can view and download conference and/or show floor theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, note that it’s likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.

PCI Express Refclk Jitter Compliance Using a Phase Noise Analyzer

Gary Giust, PhD (Sr. Manager, Product Marketing, SiTime)

Location: Great America 2

Date: Wednesday, January 30

Time: 2:00pm - 2:40pm

Track: Sponsored Sessions

Session Type: Sponsored Session

Vault Recording: TBD

Rohde & Schwarz

For the first time, PCI Express allows Refclk jitter compliance to be measured using a phase noise analyzer (PNA), as an alternative to the traditional real-time oscilloscope measurement. This talk discusses changes in the latest PCIe BASE Rev. 5.0 specifications for determining Refclk jitter compliance, impacting all data rates (GEN 1 through GEN 5). We’ll discuss the motivation for adding a compliance methodology based on phase noise, the pros and cons of phase noise versus oscilloscope methods, and clarify changes to the compliance load board. The new PNA methodology will be discussed in detail, including an exhaustive case study comparing PNA and oscilloscope compliance results spanning multiple clock devices from different clock vendors, and multiple test equipment manufacturers. Attendees will walk away with a complete understanding of how to show compliance for Refclk jitter.