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April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Idan Ben Ezra (Hardware & PI Engineer, Broadcom Semiconductors)
John Phillips (Principal Application Engineer, Cadence Design Systems Inc.)
Ilan Wolff (HW & SI/PI Engineer, Arista Networks)
Location: Ballroom F
Date: Wednesday, April 6
Time: 8:00 am - 8:45 am
Track: 10. Power Integrity in Power Distribution Networks, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Vault Recording: TBD
Audience Level: All
Predicting the overall PDN response of a system is becoming a challenging task. Especially in the high-end data-center environment where core supply voltages are getting lower, currents are rising, and allowed supply noise requirements have become stricter. This work presents a step-by-step practical guide to the modeling and co-simulation of a system's Core PDN, from PCB, through the package to the interposer. We will present a case study providing a flow to correctly model the system so that it correlates with measurement. We will discuss common pitfalls in the modeling process and will survey the required lab measurements for enabling correlation to the simulated models in frequency and time domain. The methodology will provide the design engineer with a high level of confidence in the simulations and the ability to optimize the design prior to fabrication.
The work presented, gives a methodology for lab correlated co-simulation of complex PDN structures. We will discuss common pitfalls in modeling: PDN aspects that are usually neglected by the signal power integrity engineers. We will go over the required lab measurements for enabling correlation work and measurement-based modeling, and provide the crucial details on how to carry out such measurements in real-life scenarios.
Basic knowledge of PDN design methodologies and a good understanding of PDN simulations