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Boot Camp – Power Integrity Hands-On Simulation & Measurement

Heidi Barnes (Applications Engineer, Keysight Technologies)

Steve Sandler (Founder,

Jack Carrel (Applications Engineer, Xilinx)

JackJack Carrel (Applications Engineer, Xilinx)

Location: Ballroom E

Date: Tuesday, January 29

Time: 9:00am - 4:30pm

Track: 11. Power Integrity in Power Distribution Networks

Session Type: Boot Camp

Vault Recording: TBD

Audience Level: Introductory

This boot camp combines simulation and measurement. See how the gigabit SI world of IoT, automotive, cloud server products, etc. with the demand for lower power and multiple power rails is driving new paradigms for flat impedance and not just a maximum target Z. Learn how to use impedance vs. frequency data to create measured models, estimate decoupling capacitance, and debug noise ripple on a power rail. Step through optimizing the decoupling for a DDR4 example and then run the PI eco-system simulation with AC and Harmonic balance to look at small signal and large signal responses.

Please note that we will be limiting the number of people who can attend this boot camp.


Measured models for VRM and passive components, PCB layout parasitics and EM modeling, using simulators for flat impedance decoupling optimization. The power of network Analyzer impedance measurements combined with time domain power rail observations. Simulation to measurement correlation for power integrity.

Intended Audience

Familar with power rail simulations (SPICE type), AC simulations with S-Parameter and Z-Parameters, PCB technology, capacitors, inductors, switch mode power supply basics, and low impedance 2-port shunt VNA measurements. (Bode plots are not a prerequisite.)