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Amanda (Xiaoqing) Dong (SerDes design engineer, Xilinx)
Bi Yi (SI Engineer, ZTE)
Nick (Chunxing) Huang (SI Engineer, Shenzhen Zhongzeling Electronics Co., Ltd.)
Geoff (Geoffrey) Zhang (Distinguished Engineer, Xilinx)
Location: Ballroom G
Date: Wednesday, January 29
Time: 2:50pm - 3:30pm
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass - Get your pass now!
Vault Recording: TBD
Audience Level: Intermediate
Based on compatibility and scalability requirements, electrical solutions for beyond 112Gbps need to be evaluated in PCB-based, orthogonal and cable-based backplane configurations. However, the design goals of the key components for beyond 112G are unclear. This paper serves as a trailblazer to explore the key component requirements. A top-down method is introduced for decomposing end-to-end link performance requirements from Salz-SNR analysis under PAM-based modulation schemes, down to the performance requirements for each individual component, such as connector, cable and PCB. Two sets of component design guidelines for 224G copper transmissions are proposed for smaller chassis/boxes and large chassis as examples.
This paper analyzes the feasibility of 224G PAM-based copper system using Salz SNR method. 'Optimal' signaling scheme among several candidates and its performance upper limits are predicted. A top-down specification decomposition and allocation method for each link sub-component is presented. Preliminary component design specifications are provided for industry reference.