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Crosstalk & Return Loss Budget Trade-Offs Among Different Sections in the SerDes Channel

Yaping Zhou (SI/PI manager, NVIDIA)

Ying Li (SI/PI engineer, NVIDIA)

Ying Li (PCIe Product Architect, NVIDIA)

Location: Ballroom C

Date: Thursday, January 30

Time: 9:00am - 9:45am

Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Serial Design

Format: Technical Session

Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass - Get your pass now!

Vault Recording: TBD

Audience Level: All

Crosstalk and return loss become more prominent as SerDes link speed increases and moves from NRZ to PAM4, e.g. for CEI or PCIe Gen5/6. Their budgets are well defined in the end-to-end channel but are lacking in each section for individual channel components. S-parameters of all components with different losses are cascaded to capture the complicated interactions of the multi-sectional attenuation, coupling, and reflections. Each section's impact on the overall budgets and channel margins are studied and compared in different link topology scenarios. Generalized design trade-offs of sectional crosstalk and return loss are made for best link performance with constraints.

Takeaway

Crosstalk, return loss budget and the trade-offs for each section in a SerDes channel are studied with S-parameters cascaded. Complicated interactions of attenuation, coupling, and reflections from different components are simplified to understand the individual sectional impact on overall channel margin. Design trade-offs are made for different link topologies.