April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Speaker:
Jignesh Patel (Staff Engineer, GlobalFoundries)
Authors:
Jigesh K. Patel (Product Manager, Synopsys)
Enrico Ghillino (Technical Lead R & D, Synopsys)
Pablo Mena (R&D Engineer Sr Staff, Synopsys)
Khaled Nikro (R&D Engineer Sr Staff, Synopsys)
Dan Herrmann (Manager, Synopsys)
Robert Scarmozzino (Scientist, Synopsys)
Rino Sunarto (Sr. Software Engineer, Synopsys)
Twan Korthorst (Director R&D, Synopsys)
Dwight Richards (Professor, College of Staten Island - CUNY)
Greg O’Malley (Sr Manager, GlobalFoundries)
Frederick G Anderson (Sr Manager, GlobalFoundries)
Location: Ballroom E
Date: Thursday, April 7
Time: 12:15 pm - 1:00 pm
Track: 03. Integrating Photonics & Wireless in Electrical Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Vault Recording: TBD
Audience Level: All
The transition from pluggable optics to co-packaged optics in data centers is inevitable, and silicon photonics is the technology that will help make it happen. A successful design hinges on the ability to customize photonics in a foundry technology and to co-simulate with on-board electronics. This paper presents an electro-optic (E-O) and custom photonic integrated circuit co-design flow. The design uses a mix of electrical, photonic and custom photonic components. The strength of the presented approach lies in the fact that the custom design flow creates a native, photonic-domain model, thereby preserving all optical properties. In addition, the designer can use electrical and photonic components of the interoperable process design kit (iPDK) together with the custom photonic devices in the same schematic. No user intervention for netlisting or port-mapping is required. To the best of our knowledge, this is the first time such a silicon photonics design flow has been demonstrated using a commercial foundry iPDK.
Custom photonic design is crucial when creating new IP or augmenting a PDK. As the migration to co-packaged optics (CPO) begins and the component count grows, efficient and scalable E-O co-design that supports schematic-driven layout (SDL) and back-annotation is needed. We present a design flow that meets these challenges.