April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

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Encore Presentation: Optimizing Interconnect Through Application of Bayesian Optimization Utilizing 3D EM Solvers


Suomin Cui  (Senior Software Architect , Cadence Design Systems)

Kyle Chen  (Principal Hardware Engineer, Microsoft)

Location: Mission City Ballroom B5

Date: Thursday, April 7

Time: 4:00 pm - 4:45 pm

Track: Sponsored Session

Format: Sponsored Session

Education Level: All

Pass Type: 2-Day Pass, All Access Pass, Expo Pass

Vault Recording: TBD

Audience Level: All

The augmented/mixed reality (AR/MR) wearable devices are one of edge applications. The AR/MR Head Mounted Displays (HMDs) need to overcome integrations with many sensors to serve different purposes and capabilities. They also a require small and tight physical form to be a comfortable wearable device. Flexible printed circuits (FPCs) provide a practical solution for interconnection between PCB and electronic sensors within a tight form-factor. FPC can achieve a great impedance control like rigid boards or coaxial cables. In this paper, SI optimization by applying accurate 3D finite element models will be covered. In general, 3D solver is time-consuming even though significant improvements have been made recently. Bayesian optimization is an approach to optimizing objective functions that take a long time (minutes or hours) to evaluate, therefore, it is perfect to integrate Bayesian optimization with a 3D EM solver and address the critical SI issues in FPCs. We will highlight new 3D EM technology showing the results of algorithms where Bayesian optimization is utilized. Several SI improvements will be discussed for FPCs, including impedance, common mode conversion, cross-talking FEXT and NEXT, and effectiveness of EMI film. Finally, SI simulation versus measurement correlation results will be presented.