April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Equalizer (Tx/Rx) Optimization at 112Gbps
Speakers:
Kalev Sepp (Senior Consultant, Sepson Analytics)
Ryan Chodora (R&D Software Engineer, Keysight Technologies)
Authors:
John Calvin (Senior DataCom Product Planner, Keysight Technologies)
Varun Garg (Senior R&D Engineer, Keysight Technologies)
Location: Ballroom H
Date: Thursday, April 7
Time: 8:00 am - 8:45 am
Track: 12. Applying Test & Measurement Methodology, 09. High-Speed Signal Processing, Equalization & Coding/FEC
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Vault Recording: TBD
Audience Level: All
The application of compound equalizer structures in various emerging 100G DataCom standards presents a new set of challenges for transmitter and reference receiver configuration. This optimization is critically required as part of conformal testing of these transmitter and receiver elements in these high-speed designs. This paper will review advances in "tuning" multi-gain-stage linear equalizers, decision feedback equalizers and feed forward compound equalizer structures operating in concert. The goal of the standards methodology is not to "over-tune" the equalizer structures but to define a balanced methodology which can be implemented uniformly by both test equipment and simulation tool environments. It reduces the potential for error propagation and leaves the receiver designer some margin to further improve on.
Several system level methods will be reviewed in the context of equalization performed for IEEE 802.3ck C2M and OIF CEI-112Gb-PAM4-VSR 100G specifications.
Takeaway
Optimization of advanced multi-stage CTLE/FFE/DFE behavioral equalizers for conformal measurements. This track will offer guidance for designers and validation engineers regarding equalization trade-offs and optimization needed to get passing results in 100G architectures.
