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DesignCon 2019 Presentation Viewer

Welcome to the DesignCon Presentation Store. Here you can view and download conference and/or show floor theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, note that it’s likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.

Etch Factor Impact on SI & PI

Gustavo Blando (Sr Hardware Engineer, Samtec Inc)

Scott McMorrow (CTO, Samtec Inc)

Ethan Koether (Hardware Engineer, Oracle)

Istvan Novak (Principle Signal and Power Integrity Engineer, Samtec)

Location: Ballroom D

Date: Wednesday, January 30

Time: 9:00am - 9:45am

Track: 14. Modeling & Analysis of Interconnects

Session Type: Technical Session

Vault Recording: TBD

Audience Level: Introductory

High frequency losses, crosstalk, impedance discontinuities, DC losses etc. are some of the physical phenomena that make us, SI/PI engineers spend most of our time. The slanted etch characteristics of traces called etch factor, affects all the above. This study will show how important or not is this effect for different types of applications. With the objective to provide simple guidelines to the practitioner engineer, we'll look at many cases where the etch factor plays a role, ranging from the effect on traces at high speed, to the effect on heavily perforated planes at DC for current distribution.

Takeaway

We will show how important or not is the etch factor effect for different types of applications. We'll look at many cases where the etch factor play a role, ranging from the effect on traces at high speed, to the effect on heavily perforated planes at DC for current distribution.