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IBIS-AMI Back-Channel System Optimization in Practice

Steven Parker  (Senior Staff Engineer, Marvell Semiconductor)

Jared James  (Principal Product Engineer, Cadence Design Systems)

Ambrish Varma  (Senior Principal Software Engineer, Cadence Design Systems)

Dr. Kumar Keshavan  (Senior Software Architect, Cadence Design Systems)

Ken Willis  (Product Engineering Architect, Cadence)

Matthew Kelly  (Senior Engineer , Marvell Semiconductor)

Location: Ballroom B

Date: Wednesday, January 29

Time: 8:00am - 8:45am

Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding

Format: Technical Session

Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass - Get your pass now!

Vault Recording: TBD

Audience Level: Advanced

This paper demonstrates the IBIS AMI feature for Back-Channel Support ("BCI"), why and how
it is being used, and explore interoperability between model vendors with examples from Avera
Semi and Cadence.

BCI is a lightweight message passing protocol which supports training transmitter (TX) feed
forward equalizers (FFE's) based on receiver (RX) observations. Examples are taken from
Avera Semi SerDes development showing what performance improvement is possible with BCI.
We then demonstrate interoperability with examples between two companies.

We explore possible ways in which Back-Channel Support could be expanded to improve model


The IBIS AMI Back-Channel feature is crucial for high speed SerDes
simulations and we promote the adoption and use of this for signal integrity simulations with real
examples. We then discuss how well the current IBIS specification will satisfy the next
generation technology needs and how it might be enhanced.

Intended Audience

Knowledge of IBIS AMI simulations, signal integrity simulations

Presentation Files