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Ching-Chao Huang (President, AtiaTec)
Location: Great America 2
Date: Wednesday, January 29
Time: 8:05am - 8:45am
Track: Sponsored Session
Vault Recording: TBD
Traditional de-embedding methods can give non-causal error in device-under-test (DUT) results if the test fixture and calibration structure have different impedance. This presentation introduces In-Situ De-embedding (ISD) that addresses such impedance difference through software instead of hardware, thereby improving de-embedding accuracy while reducing hardware cost. The following topics will be discussed with up to 50+ GHz measurement examples: 1. What is causality? 2. What is In-Situ De-embedding (ISD). 3. Comparison of ISD results with simulation, other de-embedding tools and Delta L method. 4. How non-causal de-embedding affects connector's compliance testing. 5. How to automatically de-skew for more predictable de-embedding results. 6. How to derive effective 2x thru from 1x open and 1x short. 7. How to derive 1x thru from 1x open or 1x short. 8. How to extract accurate PCB trace attenuation that is free of spikes and glitches. 9. How to extract PCB's material property (DK, DF, roughness) by matching all IL, RL, NEXT, FEXT and TDR/TDT of de-embedded PCB traces.