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April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Ching-Chao Huang (President, AtaiTec)
Location: Great America Meeting Room 2
Date: Wednesday, April 6
Time: 8:00 am - 8:40 am
Track: Sponsored Session
Format: Sponsored Session
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Vault Recording: TBD
Audience Level: All
Traditional de-embedding methods can give non-causal error in device-under-test (DUT) results if the test fixture and calibration structure have different impedance. This presentation introduces In-Situ De-embedding (ISD) that pioneered impedance corrected de-embedding to address such impedance difference through software instead of hardware, thereby improving de-embedding accuracy while reducing hardware cost. The topics will include an automated inter-pair de-embedding and ccICN calculation for PCIe 5.0 CEM compliance testing. Also, recent enhancements to give accurate de-embedding beyond the frequency where fixture insertion and return loss cross over. The presentation will feature 50+ GHz measurement examples.