April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

DesignCon 2022 Schedule Builder


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Mainstream Signal Integrity Workflow for PCIe 6.0 PAM4 Signaling

Speakers:

Jared James  (Sr Principal Product Engineer, Cadence)

Tony Chen  (Product Marketing Director, Cadence)

Location: Mission City Ballroom B5

Date: Thursday, April 7

Time: 2:00 pm - 2:45 pm

Track: Sponsored Session

Format: Sponsored Session

Education Level: All

Pass Type: 2-Day Pass, All Access Pass, Expo Pass

Vault Recording: TBD

Audience Level: All

With the arrival of PCIe 6.0, design teams need a solution that includes one-stop signal integrity technology that will help accelerate the path to PCIe 6.0 compliance. Learn how Cadence's design IP team and system-level signal integrity technology work together to help systems companies deploying PCIe 6.0 design it right the first time.