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Chia-Yuan Hsieh (Sr. Signal Integrity Engineer, NVIDIA)
David Chen (SI Manager, NVIDIA)
Richie Lu (Signal Integrity Engineer, NVIDIA)
Jason Tsai (Sr. Signal Integrity Engineer, NVIDIA)
Norman Chang (Sr. Signal Integrity Engineer, NVIDIA)
Sunil Sudhakaran (Director of Hardware Engineering , NVIDIA)
Location: Ballroom C
Date: Wednesday, January 29
Time: 8:00am - 8:45am
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass - Get your pass now!
Vault Recording: TBD
Audience Level: All
Conventional multi-connector cables and adaptors solution for device are too cumbersome to meet multimedia users’ desires for portability and simple setup. A new alternate mode over USB Type-C is proposed which combines high-bandwidth display (DP HBR3) and data (USB3.1 SSP) lanes to a single USB Type-C connector to deliver adequate power and bandwidth for premium entertainment. The multiplexing scheme leads to tremendous amount of signal integrity challenges. In this paper, a comprehensive discussion of the new high-speed link design, from system architecture, link budget, design challenges, optimization, to final implementation is presented.
1. Bandwidth, RL, and Xtalk isolation optimization in USB2/USB3 cross-point switch design
2. USB TypeC mid-plate optimization in USB typeC connector for Xtalk improvement
3. Cable redriver gain, connector pinout arrangement to mitigate round-trip Xtalk amplification
4. in cable wire modeling, we add eccentric parameter to show the P/N mismatch