April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

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No Exit Ramps Needed-Cadence's System Design Workflow Delivers Seamless In-Design Analysis, Reducing Turnaround Time and Minimizing Risk


Sherry Hess  (Product Marketing Group Director, Cadence)

Location: Mission City Ballroom B5

Date: Thursday, April 7

Time: 9:00 am - 9:45 am

Track: Sponsored Session

Format: Sponsored Session

Education Level: All

Pass Type: 2-Day Pass, All Access Pass, Expo Pass

Vault Recording: TBD

Audience Level: All

For many years, tools for IC and PCB design teams came from different software developers, and simulation tools came from third-party electronic design automation (EDA) companies. Each EDA company sold to an engineer that had a specific task and it was up to the systems designer to stitch together working flows. This has resulted in design teams working in silos, creating roadblocks to quickly and efficiently producing finished products that need to work as a single complete solution.

Fortunately, EDA has come a long, long way. Chip, IC package, and PCB design tools, as well as simulation solutions, are now available that can analyze the electrical integrity of the designs for each fabric available from a single EDA vendor. This keynote session will talk about strategies system developers can deploy to avoid a "throw it over the wall" mentality and instead simulate and analyze designs from one or more fabrics, whole, as the design progresses from concept through to sign-off and manufacturing.