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April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Ken Willis (Product Engineering Group Director - System-Level Analysis, Cadence)
Location: Mission City Ballroom B5
Date: Thursday, April 7
Time: 11:00 am - 11:45 am
Track: Sponsored Session
Format: Sponsored Session
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Vault Recording: TBD
Audience Level: All
As engineers turn to chiplet-based approaches using interposers to achieve their heterogenous integration goals, D2D interfaces like AIB find increasing relevance. This parallel bus standard has become one of the key enablers for this new wave of designs to efficiently interconnect chiplets. This session will provide an overview of the AIB standard, as well as extraction and simulation methodologies to enable compliance signoff for your AIB interfaces.