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DesignCon 2019 Presentation Viewer

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Panel – FEC for 112-Gbps High Speed Serial Links & Beyond

Cathy Liu (R&D Director, OIF Board Member, Broadcom)

Mike Li (Fellow, Intel)

Mike Steinberger (Lead Architect - Serial Channel Products, Sisoft)

Steve Sekel (Strategic Product Planner, Keysight)

Shaohua Yang (Distinguished Engineer/Strategic Product Marketing, Broadcom Inc)

Xiaoqing (Amanda) Dong (Principal Engineer)

Location: Ballroom G

Date: Wednesday, January 30

Time: 3:45pm - 5:00pm

Track: 10. High-Speed Signal Processing, Equalization & Coding

Session Type: Panel Discussion (Free)

Vault Recording: TBD

Audience Level: Intermediate

Forward error correction (FEC) has been widely adopted by networking and storage systems. Recently its role has become more essential for high speed serial link transmission such as 56 Gbps and 112 Gbps per lane electrical and optical interfaces. In this panel a group of speakers from cross sections of industry will share their opinions, debate the issues, and provide solutions of FEC for high speed networking and storage serial link systems.

Takeaway

Panelists are cross industry leads from system, chip, simulation, and T&M equipment areas and they will share their opinions, debates the issues of FEC and provides joint solutions for 56G and next generation of 112G serial link systems.

Intended Audience

N/A