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Panel – The Case of the Closing Eyes: Optimizing 400-GbE Signal Integrity

Chris Loberg (Sr. Director, Tektronix, Inc.)

Ransom Stephens (Owner, Ransom's Notes)

Pavel Zivny (Domain Expert, Tektronix, Inc.)

Cathy Liu (R&D Director, OIF Board Member, Broadcom)

Greg LeCheminant (Engineer, Keysight)

Martin Miller (Chief Scientist, Teledyne-LeCroy)

Mark Marlett (Sr. Principal System Engineer, Inphi)

Location: Ballroom E

Date: Tuesday, January 29

Time: 4:45pm - 6:00pm

Track: 09. Measurement, Simulation & Optimization of Jitter, Noise & Timing to Minimize Errors

Session Type: Panel Discussion (Free)

Vault Recording: TBD

Audience Level: All

Join industry experts in a lively, informative panel discussion centered on solving signal integrity challenges present in PHY layer transmission techniques like PAM4, Coherent Modulation. Discussion topics will be led by veterans from the Chip and Test & Measurement industries. Please plan to participate in this active dialog kicking off DesignCon 2019.


This Panel Session will provide the following insights for attendees:
1. Implementation challenges for next-generation network designs in silicon and package, I/O.
2. Testing techniques to overcome challenges
3. Plans for next generation test equipment to address new challenges
4. Open dialog with audience to answer questions and build deeper understanding

Intended Audience

Attendees should have a basic understanding of networking standards and signal integrity challenges in achieving error-free transmission and successful interop.