Welcome to the DesignCon 2020 agenda and presentation download site. Here you can view and download conference and/or Chiphead Theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.
Cathy Liu (SerDes Architect, Broadcom)
Chris Loberg (Sr. Technical Marketing Manager, Tektronix, Inc.)
Mark Marlett (Sr. Principal System Engineer, Inphi Corp)
Mike Li (Fellow, Intel)
Ransom Stephens (Signal Integrity Sage, Ransom's Notes)
Pavel Zivny (Domain Expert, Tektronix)
Greg LeCheminant (Measurement Applications Specialist, Keysight Technologies)
Hiroshi Goto (Sr. Business Development Manager, Anritsu)
Location: Ballroom F
Date: Tuesday, January 28
Time: 4:45pm - 6:00pm
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass - Get your pass now!
Vault Recording: TBD
Audience Level: All
Join this panel of experts for a lively panel discussion on the state of testing practices for high-speed networking technologies. This year's panel will be evaluating the pros and cons of characterization efforts for 400GbE over PAM4. Chip experts will discuss design verification challenges while the test & measurement industry veterans will provide direction on testing implementation plans. Come prepared to engage in the discussion!
Lively discussion on the latest standards, testing approaches and design implementation for 400G PAM4. Great educational value to all participants.