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Cathy Liu (Distinguished Engineer, Broadcom Inc.)
Jane Lim (Senior Manager, Cisco Systems)
Rob Stone (Distinguished Engineer , Broadcom Inc.)
Richard Ward (Technical Director R&D, Intel)
Pervez Aziz (Senior Principal Engineer , Nvidia)
Lars Thon (Consultant, LT Engineering)
Location: Ballroom G
Date: Thursday, January 30
Time: 3:45pm - 5:00pm
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass - Get your pass now!
Vault Recording: TBD
Audience Level: Intermediate
Recently industry and standard bodies have kicked off new projects aiming at 800GbE or even higher than 1TbE. Join this panel of experts for a lively panel discussion on what is needed for the next speed node past 112 Gb/s, say 224 Gb/s. In this panel system vendors and chip developers will discuss and share the insights on their system needs and gaps, design challenges and potential solutions for next generation high-speed networking technologies. It will provide audience an opportunity to hear and discuss new technologies such as chiplet/system-on-Chip (SOC), optical interconnects in data center, advanced modulation, signal processing, and coding.
Lively discussion on what is needed for the next generation networking system beyond 400GE and 112 Gb/s interface. Great educational and inspired value to all participants.