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PCB Interconnect Modeling Demystified

Bert Simonovich (High-speed Signal Integrity Consultant | Backplane Specialist, Lamsim Enterprises Inc.)

Location: Ballroom F

Date: Thursday, January 31

Time: 10:00am - 10:45am

Track: 06. Applying Chip-to-Chip and Advanced PCB Design & Simulation Techniques, 05. Advances in Materials & Processing for PCBs, Modules & Packages

Session Type: Technical Session

Vault Recording: TBD

Audience Level: Intermediate

In order to ensure first time success for 28GB/s and above, accurate interconnect modeling is a prerequisite. Although many EDA tools include the latest and greatest models for conductor surface roughness and wide-band dielectric properties, obtaining the right parameters to feed the models is always a challenge. So how do we get these parameters? Often the only sources are from data sheets. In most cases the numbers do not translate directly into parameters needed for these tools. By using dielectric material properties, copper foil and oxide alternative roughness parameters from data sheets, a practical method of modeling high-speed PCB interconnect is presented and correlated to measured data.


The key takeaway from this presentation will show a simple method to model high-speed PCB interconnects for loss by extracting dielectric, conductor roughness parameters from data sheets alone.

Intended Audience

Target audience is anyone involved in the design and fabrication of high-speed PCBs, and needs to model PCB transmission line losses and phase delay using data sheet parameters. A basic understanding of transmission line theory, dielectric and metal properties, S-parameters, PCB stackup and fabrication would be useful.

Presentation Files