April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

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PCB Stackup & Launch Optimization in High-speed PCB Designs


Shawn Tucker  (Signal Integrity Engineer, Samtec)


Travis Ellis  (Signal Integrity Engineer, Samtec)

Shawn Tucker  (Signal Integrity Engineer, Samtec)

Location: Ballroom E

Date: Thursday, April 7

Time: 8:00 am - 8:45 am

Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Link Design

Format: Technical Session

Education Level: Advanced

Pass Type: 2-Day Pass, All Access Pass

Vault Recording: TBD

Audience Level: Advanced

Validation of next generation systems requires high frequency instrument test access with system bandwidth needs exceeding 100 GHz. Compression mount vertical launch connectors are widely used for these applications due to the advantages of precision impedance, shielding, and standardization that coaxial designs offer, so this will be our focus. Balance trade-offs with material selection, stackup design, and RF launch optimization techniques being covered. With the help of engineering principles, mathematical equations, simulation, and measurements, we'll show theory and more importantly practical solutions for many of the issues encountered in high performance designs in a real-world system.


1. To solve these problems you must address the root cause.
2. Conflicting requirements force you to understand the magnitude of each problem to make adequate trade-offs.
3. To overcome these challenges, a revised strategy may be required.

Intended Audience

This presentation will assume a fundamental level of understanding of pcb design and 3D modeling.