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Robust Simultaneous Switching Noise Prediction for Test using Deep Neural Network

Bonita Bhaskaran (Senior Hardware Engineer, Nvidia Corporation)

Seyed Nima Mozaffari (Senior Hardware Engineer, Nvidia Corporation)

Location: Ballroom D

Date: Thursday, January 31

Time: 11:00am - 11:45am

Track: 15. Machine Learning for Microelectronics, Signaling & System Design, 11. Power Integrity in Power Distribution Networks

Session Type: Technical Session

Vault Recording: TBD

Audience Level: All

Power Supply noise during scan testing is much higher than functional mode since the switching activity is much higher. Also, Automatic Test Pattern Generation tools follow a greedy algorithm where they excite more faults simultaneously to get higher test coverage in shorter Test Time (TT). Since exhaustive test pattern simulation is memory-intensive and needs high run time, we have to rely on rigorous post-silicon power noise characterization to optimize the test vectors. In this work, we applied Deep Learning (DL) algorithms to build a fast Deep Neural Network (DNN) model to predict Simultaneous Switching Noise (SSN) during scan capture.


In this work, we will present results of Power Noise Prediction on newer GPUs by using a Deep Neural Network trained on older GPUs in the same process node. The reduction in Test Time and Test Cost per die due to early analysis of noise will also be illustrated.

Presentation File