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Solving PCI Express 5.0 Test Methodologies and Measurement Challenges

Dan Froelich  (Director of Systems Engineering, Tektronix)

Location: Room 203

Date: Wednesday, January 29

Time: 11:05am - 11:45am

Track: Sponsored Session

Vault Recording: TBD


Due to increasing requirements imposed by cloud-based compute power, storage capacity, and network bandwidth, the server/storage industry is rapidly progressing to PCIe Gen5. This rapid progression brings an entirely new set of test and measurement challenges for both base silicon testing and CEM compliance testing.

This webinar will discuss how to solve some of the new test and measurement challenges for PCIe 5.0 at 32.0 GT/s.
The key topics covered in this presentation are as follows:
• PCI Express 5.0 Motherboard TX methodology. Discuss pros and cons of different methodologies and Tektronix solutions.
• PCI Express 5.0 Base Rx Calibration methodology walk through and Tektronix software options.