DesignCon 2022 Schedule Builder

As the data rate and performance of single-ended parallel interfaces evolves, the need for a practical approach to examine such interfaces becomes more evident. Traditionally, transient simulations performed in time domain has been the gold standard for qualification of single-ended parallel interfaces such as double data rate (DDR) memory interface. However, the increased data rate as well as augmented complexity to transistor-level driver models have made it difficult, to rely on transient simulations for link qualification at the data rates of today. On the other hand, although statistical techniques leverage the luxury of statistical models to output statistical data at bit error rates (BER) that are unreasonable for time domain approaches, statistical methods are being criticized due to their reduced accuracy compared to transient.
This paper aims to compare the two approaches through an LPDDR4 design case study in which the pros and cons of both methods are discussed. Simulation results are demonstrated for both transient and statistical approaches and critical factors are considered to distinct the two approaches in terms of accuracy, complexity, simulation time and their overall practicality over the course of a product design. Finally, the paper summarizes the key finding of the study to serve as a practical guideline in adopting the appropriate approach that best suits the application of interest.

Takeaway

A comparative study comparing transient and statistical techniques through an LPDDR4 design case study. Simulation results are demonstrated for both approaches and critical practical factors are considered to distinct the two approaches in terms of accuracy, complexity, simulation time and their overall practicality over the course of a product design.