Welcome to the DesignCon 2020 agenda and presentation download site. Here you can view and download conference and/or Chiphead Theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.
Yuriy Shlepnev (President, Simberian Inc.)
Vadim Heyfitch (Signal Integrity Engineer, Sr. MTS, Package Developement Group, Xilinx)
Location: Ballroom C
Date: Tuesday, January 28
Time: 1:30 pm - 4:30 pm
Track: 13. Modeling & Analysis of Interconnects
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass - Get your pass now!
Vault Recording: TBD
Audience Level: Intermediate
Successful design of interconnects means that all links operate at the target data rate on the first pass, without time consuming re-spins and tedious troubleshooting. What does it take to succeed? We review various analysis techniques and aspects of design process for interconnects operating at 6-112 Gbps and rank them by significance, risk, or impact on obtaining a working design. We discuss multiple case studies that involve both analysis and measurements. We will provide analysis of what should be done to further extend the data rates and how interconnects of the future should look like.
Better understanding of the signal degradation mechanisms in PCB/packaging interconnects with increased data rates and signal bandwidth. Learn what is important to know and how to design predictable PCB/packaging interconnects and to avoid design re-spins.
Basic Signal Integrity.
SLIDES_Track13_DesignInsightsFromEMAnalysis_Shlepnev_Heyfitch_final2.pdf