April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

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Tutorial – The Real World of Power Integrity & Signal Integrity Working Together

Speakers:

Heidi Barnes  (SI and PI Applications Engineer, Keysight Technologies)

Steve Sandler  (Founder, Picotest.com)

Jack Carrel  (Applications Engineer , AMD)

Location: Ballroom EF

Date: Tuesday, April 5

Time: 2:00 pm - 4:30 pm

Track: 10. Power Integrity in Power Distribution Networks

Format: Tutorial

Theme : Automotive, Data Centers

Education Level: All

Pass Type: All Access Pass

Vault Recording: TBD

Audience Level: All

It might be obvious that noise on the power rail can cause data transmission errors, but what is not obvious is how to quantify the margins. What types of errors can noise on the power rail cause and which ones are more important. What is going to be the biggest challenge, power rail noise on the PLL, power rail noise on the Transceiver, or power rail crosstalk with signal nets on the PCB to name a few. How much of the margin do I assign to each of these sources of degradation?

This tutorial goes beyond just designing for a given specification such as target impedance or max mV’s of ripple and takes a holistic approach of understanding the relationship between the power rail and the signal degradation. Real world examples are used to demonstrate power rail issues in a relatable way. One obvious example that still can be found in the industry is the misconception that adding ferrites will magically isolate a sensitive circuit. We’ll look at how these ferrite beads can cause problems as well as how to avoid or correct these issues.

Takeaway

Learn how Power Integrity impacts Signal Integrity with real world examples. Discover why power integrity engineers hate ferrite beads. Understand the Power Integrity ecosystem and a holistic approach to understanding the margins that matter.

Intended Audience

No prerequisites required, but recommend some familiarity with power integrity target Z and s-parameter PDN models.