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Will My 25-Gb Channel Work for 112-Gb Signals?

Alex Manukovsky (Technical Lead, SI/PI Team, Intel)

Amiram Jibly (Senior SI Engineer, Intel)

Adee Ran (Principal Engineer, Intel)

Stas Litski (Engineer, Intel)

Location: Ballroom A

Date: Thursday, January 31

Time: 2:50pm - 3:30pm

Track: 04. System Co-Design: Modeling, Simulation & Measurement Validation, 08. Optimizing High-Speed Serial Design

Session Type: Technical Session

Vault Recording: TBD

Audience Level: All

As technology evolves, the data rate is getting higher. However, the interconnect technology is usually a step behind, in terms of cables, connectors, and printed circuit manufacturing. In this work we will examine several test cases of over 100 different channels to explore at what scenarios a 25G channel will be adequate for 112G signals, showing the challenges of 112G signaling, and the issues calling for more effort on the part of the system engineer. Manufacturing variation of both PCB channels and Si are taken into account.


In order to avoid the costs associated with infrastructure upgrade the use of a 25G interconnect system for a 112G signals is examined, assessing the impact on the performance. Learn how to pre-qualify acceptable channels and identified channel properties having significant impact on system performance.

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