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April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Joseph Kho Boon Hock is a validation technical lead at Intel Corporation and Altera corporation, focusing on electrical validation of HSIO. He leads electrical validation and product development for several generations of HSIO on FPGA products. This cover SEDER technology from 6Gbps generation to 112Gbps generation. He has 6 technical publications and 3 U.S patterns. He received his B.S in Electronic Engineering from Multimedia University, Malaysia.