April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Jong-Ru Guo, Analog Engineer, Intel
Dr. Jong-Ru Guo is an analog design engineer at Intel Data Platform Group. He works on various I/O architectures including die-to-die and high-speed serial I/Os to support different standards and specifications. Prior to Intel, he developed high speed serial links ranging from 6.4Gbps to 28Gbps. His experience covers semiconductor physics & process, circuits, and platforms related designs. He has over 15 patents issued or pending.
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