April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Vijay Kasturi, Technical Lead Signal Integrity, Intel
Vijay Kasturi is currently Lead SI/PI Engineer in the Intel IP Group, working on I/O modeling and SI/PI solutions for next-gen DDR and SERDES IP Products. He graduated with a master’s degree specializing in EMC from University of Missouri-Rolla. He has 15+ years’ experience in the SI/PI areas and published multiple external and Intel internal papers and patents.
Presenting:
