DesignCon 2022 Schedule Builder

Joungho Kim (Fellow, IEEE) received the B.S. and M.S. degrees from Seoul National University, Seoul, South Korea, in 1984 and 1986, respectively, and the Ph.D. degree from the University of Michigan, Ann Arbor, MI, USA, in 1993, all in electrical engineering. He joined the Memory Division, Samsung Electronics, Suwon, South Korea, in 1994, where he was involved in a gigabit-scale DRAM design. In 1996, he joined the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, where he is currently a Professor with the Department of Electrical Engineering. He is also the Director of the 3-D Integrated Circuit (IC) Research Center supported by SK Hynix, Inc., Icheon, South Korea, and the Smart Automotive Electronics Research Center supported by KET, Inc., Incheon, South Korea. He has given more than 219 invited talks and tutorials in academia and related industries. He has authored or coauthored more than 404 technical articles in refereed journals and conference proceedings. He has authored a book titled Electrical Design of Through-Silicon-Via (Springer, 2014). In particular, his major research interests include chip package printed circuit board (PCB) co-design and co-simulation for signal integrity, power integrity, ground integrity, timing integrity, and radiated emission in 3-D integrated circuit (IC), through-silicon via (TSV), and interposer. His current research interests include electromagnetic compatibility (EMC) modeling, design, and measurement methodologies of 3-D IC, TSV, interposer, system in package, multilayer PCB, and wireless power transfer (WPT) technology for 3-D IC.

Presenting:

• A New Challenge for Neuromorphic Computing Systems: From Off-chip Interconnects to On-chip Interconnects
• A Processing-In-memory on High-bandwidth Memory (PIM-HBM): Impact of Interconnect Channels on System Performance in 2.5D/3D IC
• Data-Efficient Machine Learning Method for Hardware Routing: Signal Integrity Demonstration to 2PDC and PCIe 6.0
• Deep Reinforcement Learning-based Channel-flexible Equalization Scheme: An Application to High Bandwidth Memory
• Imitate Expert Policy & Learn Beyond: A Practical PDN Optimizer by Imitation Learning
• Imitation Learning with Bayesian Exploration (IL-BE) for Signal Integrity (SI) of PAM-4 based High-speed Serial Link: PCIe 6.0
• Learning Super-scale Microbump Pin Assignment Optimization for Real-world PCB Design with Graph Representation
• Thermal Transmission Line: Smoothing Thermal Gradients & Lowering Temperature for Signal Integrity Improvement of HBM & 2.5D ICs